cmpldes2.script

design compile synthesis user guide

/* design_analyzer script file for Chapter 9 */

/* Note: This script is run after the first compile completes. */

/* Remove any designs in memory */
remove_design -all

/* Read in the optimized design*/
read -format db {./db/compile.db}
create_schematic -size infinite -gen_database
current_design = "compile.db:TOP"
create_schematic -size infinite -symbol_view
create_schematic -size infinite -hier_view

/* Generate the area and constraints reports */
report_area
report_constraints

/* Set new constraints */
create_clock -name CLK -period 23 -waveform { 0 11.5 } { CLK }

/* Reoptimize the design and explore the design space */
compile -map_effort medium -verify -verify_effort low -boundary_optimization
current_design = "compile.db:TOP"
create_schematic -size infinite -schematic_view -symbol_view -hier_view

/* Generate area and constraints reports on the optimized design*/
report_area
report_constraints

/* Save the optimized design*/
write -format db -hierarchy -output "./db/TOP_compiled.db" {"compile.db:TOP"}

/* Delete designs */
remove_design find(design,"*")

/****** Optional Exercise - Instance-Specific Hierarchy ******/
read -format db {"./db/TOP_before_compile.db"}

/* set current design to TOP */
current_design = TOP

/* set current instance to CONVERTOR_CKT TOP/U3 */
current_instance U3

/* set current instance to CONVERTOR_1 TOP/U3/U7 */
current_instance U7
report_net
set_load 2.5 A0
report_net
current_instance .
current_instance ..
current_instance

quit