command.log

design compile synthesis user guide

mentor_write_symbols = "true"
net_layer.blue = 65535
net_layer.green = 65535
net_layer.line_width = 1
net_layer.red = 0
net_layer.scalable_lines = "false"
net_layer.visible = "true"
net_name_layer.blue = 65535
net_name_layer.green = 65535
net_name_layer.red = 65535
net_name_layer.visible = "false"
osc_layer.blue = 0
osc_layer.green = 65535
osc_layer.line_max = 2
osc_layer.line_width = 200
osc_layer.red = 65535
osc_layer.scalable_lines = "true"
osc_layer.visible = "true"
osc_name_layer.blue = 65535
osc_name_layer.green = 65535
osc_name_layer.red = 65535
osc_name_layer.visible = "true"
output_order = {}
pin_name_layer.blue = 65535
pin_name_layer.green = 65535
pin_name_layer.red = 65535
pin_name_layer.visible = "false"
pla_read_create_flip_flop = "false"
plot_box = "false"
plot_command = "lpr -Plw "
plot_orientation = "best_fit"
plot_scale_factor = 100
plotter_maxx = 584
plotter_maxy = 764
plotter_minx = 28
plotter_miny = 28
port_complement_naming_style = "%s_BAR"
port_edge_rate = 0.000000
port_layer.blue = 0
port_layer.green = 65535
port_layer.line_max = 2
port_layer.line_width = 200
port_layer.red = 65535
port_layer.scalable_lines = "true"
port_layer.visible = "true"
port_name_layer.blue = 65535
port_name_layer.green = 65535
port_name_layer.red = 65535
port_name_layer.visible = "true"
preserve_subshells = {"hdl_shell_exec"}
product_build_date = "Nov 26, 1991"
product_version = "v2.2a"
read_array_minus_style = "-%d"
read_array_naming_style = "%s[%d]"
read_array_separator_style = "]["
read_inferred_bus_naming_style = ""
ripper_pin_name_layer.blue = 65535
ripper_pin_name_layer.green = 65535
ripper_pin_name_layer.red = 65535
ripper_pin_name_layer.visible = "false"
schematic_file_suffix = {"sdb"}
search_path = {".", "/remote/release/v2.2a/libraries/syn", "/remote/release/v2.2a/libraries"}
sheet_fill_percent = 100
sheet_hard_limit = "true"
sheet_orientation = "landscape"
sheet_size = "infinite"
sheet_sizes = {"A", "B", "C", "D", "E", "infinite", "mentor_maximum"}
single_group_per_sheet = "false"
sort_outputs = "false"
symbol_layer.blue = 0
symbol_layer.green = 65535
symbol_layer.line_max = 3
symbol_layer.line_width = 200
symbol_layer.red = 65535
symbol_layer.scalable_lines = "true"
symbol_layer.visible = "true"
symbol_library = {"lsi_10k.sdb"}
symbol_library_suffix = {"sdb"}
symbol_name_layer.blue = 65535
symbol_name_layer.green = 65535
symbol_name_layer.red = 65535
symbol_name_layer.visible = "true"
symbol_source_suffix = {"slib"}
synopsys_program_name = "dc_shell"
synopsys_root = "/remote/release/v2.2a"
synthetic_library = {"standard.sldb"}
target_library = {"simple.db"}
tdlout_upcase = "true"
technology_library_suffix = {"db"}
technology_source_suffix = {"lib"}
template_layer.blue = 45875
template_layer.green = 45875
template_layer.line_width = 3
template_layer.red = 0
template_layer.scalable_lines = "false"
template_layer.visible = "true"
template_naming_style = "%s_%p"
template_parameter_style = "%s%d"
template_separator_style = "_"
template_text_layer.blue = 65535
template_text_layer.green = 65535
template_text_layer.red = 65535
template_text_layer.visible = "true"
test_clock_port_naming_style = "test_c%s"
test_scan_clock_a_port_naming_style = "test_sca%s"
test_scan_clock_b_port_naming_style = "test_scb%s"
test_scan_clock_port_naming_style = "test_sc%s"
test_scan_enable_inverted_port_naming_style = "test_sei%s"
test_scan_enable_port_naming_style = "test_se%s"
test_scan_in_port_naming_style = "test_si%s%s"
test_scan_out_port_naming_style = "test_so%s%s"
text_change_select_region_mode = "basic"
text_editor_command = "xterm -fn 8x13 -e vi %s &"
text_print_command = "lpr -Plw"
text_threshold = 6
text_unselect_on_button_press = "true"
uniquify_naming_style = "%s_%d"
use_port_name_for_oscs = "true"
user_home_path = "/remote/osi15/randyj"
variable_layer.visible = "false"
verbose_messages = "true"
verilogout_equation = "false"
verilogout_no_tri = "false"
verilogout_single_bit = "false"
verilogout_time_scale = 1.000000
verilogout_top_instance_name = "u1"
vhdllib_glitch_handle = "true"
vhdllib_timing_mesg = "true"
vhdllib_timing_xgen = "false"
vhdlout_bit_type = "BIT"
vhdlout_bit_vector_type = "BIT_VECTOR"
vhdlout_conversion_functions = {}
vhdlout_dont_write_types = "false"
vhdlout_equations = "false"
vhdlout_isolate_type_conversions = "FALSE"
vhdlout_local_attributes = "true"
vhdlout_one_name = "'1'"
vhdlout_preserve_hierarchical_types = "FALSE"
vhdlout_single_bit = "true"
vhdlout_target_simulator = ""
vhdlout_three_state_name = "'Z'"
vhdlout_three_state_res_func = ""
vhdlout_time_scale = 1.000000
vhdlout_unknown_name = "'X'"
vhdlout_upcase = "false"
vhdlout_use_packages = {}
vhdlout_wired_and_res_func = ""
vhdlout_wired_or_res_func = ""
vhdlout_write_attributes = "false"
vhdlout_write_components = "TRUE"
vhdlout_write_constraints = "false"
vhdlout_zero_name = "'0'"
view_arch_types = {"apollo", "decmips", "hp300", "hp700", "mips", "necmips", "rs6000", "sgimips", "sonymips", "sun3", "sparc"}
view_background = "black"
view_banner_font = "9x15"
view_busy_during_selection = "false"
view_command_log_file = "command_log.out"
view_dialogs_modal = "true"
view_disable_cursor_warping = "true"
view_disable_error_windows = "false"
view_error_window_count = 3
view_execute_script_suffix = {".script", ".scr", ".dcs", ".dcv", ".dc", ".con"}
view_extend_thick_lines = "true"
view_icon_font = "8x13"
view_icon_path = "/remote/release/v2.2a/sparc/syn/auxx/icons"
view_ignore_source_file_dates = "true"
view_log_file = "view_log.script"
view_num_lines_to_auto_scroll = 0
view_pixels_per_route_grid = 0
view_read_file_suffix = {"db", "sdb", "edif", "eqn", "fnc", "lsi", "mif", "NET", "pla", "st", "tdl", "v", "vhd", "vhdl"}
view_set_cursor_area = 8
view_set_selecting_color = ""
view_use_small_cursor = ""
view_use_x_routines = "true"
view_win_height = 500
view_win_width = 600
view_write_file_suffix = {"db", "sdb", "do", "edif", "eqn", "fnc", "lsi", "NET", "neted", "pla", "st", "tdl", "v", "vhd", "vhdl"}
working_path = "/remote/osi15/randyj/examples/vhdl/ROM"
write_name_nets_same_as_ports = "false"
x11_set_cursor_background = ""
x11_set_cursor_foreground = ""
x11_set_cursor_number = "-1"


/* Initial dc_shell Aliases */


alias cde          	"current_design ="
alias free         	"remove_design"
alias fsm_minimize 	"minimize_fsm"
alias fsm_reduce   	"reduce_fsm"
alias gen          	"create_schematic"
alias group_bus    	"create_bus"
alias groupvar     	"group_variable"
alias gv           	"gen -sort ;view"
alias lint         	"check_design"
alias ls           	"sh ls -AC"
alias map          	"compile -no_flatten -no_s -map 1"
alias q            	"quit"
alias re           	"read -f equation"
alias report_area  	"report -area"
alias report_cell  	"report -cell"
alias report_clock 	"report_clocks"
alias report_clock_constraint 	"report -clock_constraint"
alias report_clock_tree 	"report -clock_tree"
alias report_compile_options 	"report -compile_options"
alias report_constraint 	"report_constraints"
alias report_design 	"report -design"
alias report_fsm   	"report -fsm"
alias report_hierarchy 	"report -hierarchy"
alias report_internal_loads 	"report -internal_loads"
alias report_net   	"report -net"
alias report_port  	"report -port"
alias report_power 	"report -power"
alias report_reference 	"report -reference"
alias report_register 	"report -register"
alias report_synthetic 	"report -cell"
alias report_xref  	"report -xref"
alias rlsi         	"read -f lsi"
alias rpla         	"read -f pla"
alias rv           	"read -f verilog"
alias rvhdl        	"read -f vhdl"
alias set_internal_arrival 	"set_arrival"
alias set_internal_load 	"set_load"
alias sge          	"edifout_no_array = true ; edifout_merge_libraries = true ; edifout_external = false ; edifout_power_and_ground_representation = cell ; "
alias ungroup_bus  	"remove_bus"
alias ver          	"list product_version"
alias verify       	"compare_design"
alias view_cursor_number 	"x11_set_cursor_number"
alias we           	"write -f equation"
alias wlsi         	"write -f lsi"
alias wpla         	"write -f pla"
alias wrvhdl       	"write -f vhdl"
alias wv           	"write -f verilog"


/* dc_shell Command Log */ 


rvhdl ROM.vhd 
rvhdl ROM.vhd 
quit