example.rpt

design compile synthesis user guide

***************************************************************************
               Date      : Fri Dec  3 15:28:08 1999
               Version   : 2000.05-SI1
               Design    : example
***************************************************************************

*******************************************
*  Register usage of process reset_loop:  *
*******************************************

	Storage resource types
=======================
    r179.......16-bit register 
    r1555......1-bit register 
    r1565......1-bit register 
    r1750......16-bit register 
    r1811......7-bit register 
    r3180......16-bit register 
    r5531......16-bit register 
    r5875......8-bit register 
    r5877......7-bit register 



-------+-------+-------+------+-------+-------+-------+-------+-------+-------
 cycle | r1750 | r5531 | r179 | r3180 | r5875 | r1811 | r5877 | r1555 | r1565 
-------------------------------------------------------------------------------
       | (16)  | (16)  | (16) | (16)  |  (8)  |  (7)  |  (7)  |  (1)  |  (1)  
===============================================================================
   0   |.......|.......|......|.......|.......|.......|.......|.......|.......
   1   |.......|.......|......|.......|.......|.......|.......|..v16..|.......
   2   |.......|.......|..v8..|.......|.......|.......|.......|.......|.......
   3   |.......|.......|..v8..|.......|..v9...|.......|.......|.......|.......
   4   |.......|.......|..v8..|.......|..v9...|.......|.......|.......|.......
   5   |..v0...|.......|......|.......|.......|.......|.......|.......|.......
   6   |.......|..v1...|......|.......|.......|..v12..|.......|..v14..|.......
   7   |.......|..v1...|..v7..|.......|.......|..v12..|.......|..v14..|..v15..
   8   |.......|..v1...|.v10..|.......|..v11..|..v12..|..v13..|..v14..|..v15..
   9   |.......|..v1...|.v10..|.......|..v11..|..v12..|..v13..|..v14..|..v15..
  10   |..v3...|..v1...|......|.......|.......|..v12..|..v13..|..v14..|..v15..
  11   |.......|..v1...|..v4..|.......|.......|..v12..|..v13..|..v14..|..v15..
       |.......|.......|..v2..|.......|.......|.......|.......|.......|.......
  12   |.......|..v1...|..v5..|.......|.......|..v12..|..v13..|..v14..|..v15..
       |.......|.......|..v2..|.......|.......|.......|.......|.......|.......
  13   |.......|..v1...|......|..v6...|.......|..v12..|..v13..|..v14..|.......
  14   |.......|..v1...|......|.......|.......|.......|..v13..|..v14..|.......
  15   |.......|.......|......|.......|.......|.......|.......|.......|.......
  16   |.......|.......|......|.......|.......|.......|.......|.......|.......
  17   |.......|.......|......|.......|.......|.......|.......|.......|.......


	Data value name abbreviations
=======================
    v0.......16-bit data value operational_loop/calc_offset_46/mul_81/Z
    v1.......16-bit data value operational_loop/read_write_loop/thresh_offset
    v2.......16-bit data value operational_loop/read_write_loop/calc_offset_53/add_81/Z
    v3.......16-bit data value operational_loop/read_write_loop/calc_offset_53/mul_81/Z
    v4.......16-bit data value operational_loop/read_write_loop/cell_value_57/var
    v5.......16-bit data value operational_loop/read_write_loop/cell_value_57/var_0
    v6.......16-bit data value operational_loop/read_write_loop/cell_write_mem_write/D
    v7.......16-bit data value operational_loop/read_write_loop/cell_read_mem_read1/seq_cell_2/Q
    v8.......8-bit data value operational_loop/threshold_thresh1/net
    v9.......8-bit data value operational_loop/threshold_thresh2/net
    v10......8-bit data value operational_loop/read_write_loop/cell1_mem_read1/net
    v11......8-bit data value operational_loop/read_write_loop/cell2_mem_read2/net
    v12......7-bit data value operational_loop/read_write_loop/i
    v13......7-bit data value operational_loop/read_write_loop/add_49/Z
    v14......1-bit data value operational_loop/read_write_loop/U2/Z
    v15......1-bit data value operational_loop/read_write_loop/U6/Z
    v16......1-bit data value operational_loop/start_loop/U2/Z


***********************************************
*  Operation schedule of process reset_loop:  *
***********************************************

	Resource types
=====================================
    busy.......1-bit registered output port 
    done.......1-bit registered output port 
    loop.......loop boundaries 
    p0.........16-bit registered output port cell_out
    p1.........1-bit registered output port cell_out_valid
    p2.........8-bit input port threshold
    p3.........1-bit input port use_thresh_offset
    p4.........1-bit input port start
    r25........(7_7->1)-bit DW01_cmp2 
    r38........(8_8->16)-bit DW02_mult 
    r152.......(8_8_16->16)-bit cs_rr100x50 
    r172.......(16_16->16)-bit DW01_add 
    r1564......(8_7->8)-bit DW01_add 
    r3388......(16->16)-bit DW01_inc 



                                                                         c                            
                                                                         s                            
                                                   D              D      _                            
                                    D       D      W      D       W      r                            
                                    W       W      0      W       0      r                            
                                    0       0      1      0       2      1                            
                                    1       1      _      1       _      0                            
                 p     p     p      _       _      c      _       m      0      p     p     p      p  
                 o     o     o      a       a      m      i       u      x      o     o     o      o  
                 r     r     r      d       d      p      n       l      5      r     r     r      r  
                 t     t     t      d       d      2      c       t      0      t     t     t      t  
-------+------+-----+-----+-----+-------+------+------+-------+------+------+------+-----+-----+------
 cycle | loop | p2  | p3  | p4  | r1564 | r172 | r25  | r3388 | r38  | r152 | busy | p0  | p1  | done 
-------------------------------------------------------------------------------------------------------
   0   |..L0..|.....|.....|.....|.......|......|......|.......|......|......|.W31..|.W32.|.W33.|.W30..
   1   |..L8..|.....|.....|.R38.|.......|......|......|.......|......|......|......|.....|.....|......
       |..L3..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
   2   |.L13..|.R42.|.....|.....|.......|......|......|.......|......|......|.W43..|.....|.....|......
       |.L12..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
       |..L9..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
   3   |......|.R45.|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
   4   |......|.....|.....|.....|.......|......|......|.......|.o81a.|......|......|.....|.....|......
   5   |......|.....|.....|.....|.......|......|......|.......|.o81a.|......|......|.....|.....|......
   6   |..L6..|.....|.....|.....|.......|......|.o49a.|..o81..|......|..oB..|......|.....|.....|......
   7   |.L11..|.....|.R54.|.....|..o51..|......|......|.......|......|..oC..|......|.....|.....|......
       |......|.....|.....|.....|.......|......|......|.......|......|..oz..|......|.....|.....|......
   8   |......|.....|.....|.....|..o49..|......|......|.......|......|..oA..|......|.....|.....|......
   9   |......|.....|.....|.....|.......|......|......|.......|.o81c.|......|......|.....|.....|......
  10   |......|.....|.....|.....|.......|......|......|.......|.o81c.|......|......|.....|.....|......
  11   |......|.....|.....|.....|.......|......|......|.o81b..|......|......|......|.....|.....|......
  12   |......|.....|.....|.....|.......|.o55..|......|.......|......|......|......|.....|.....|......
  13   |......|.....|.....|.....|.......|.o55..|......|.......|......|......|......|.W60.|.W61.|......
  14   |......|.....|.....|.....|..o59..|......|......|.......|......|..oy..|......|.....|.W63.|......
  15   |.L10..|.....|.....|.....|.......|......|......|.......|......|......|.W68..|.....|.....|.W67..
       |..L7..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
  16   |......|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|.W70..
  17   |..L5..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
       |..L4..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
       |..L2..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......
       |..L1..|.....|.....|.....|.......|......|......|.......|......|......|......|.....|.....|......


	Operation name abbreviations
========================================================
    L0........loop boundaries reset_loop_design_loop_begin
    L1........loop boundaries reset_loop_design_loop_end
    L2........loop boundaries reset_loop_design_loop_cont
    L3........loop boundaries operational_loop/operational_loop_design_loop_begin
    L4........loop boundaries operational_loop/operational_loop_design_loop_end
    L5........loop boundaries operational_loop/operational_loop_design_loop_cont
    L6........loop boundaries operational_loop/read_write_loop/read_write_loop_design_loop_begin
    L7........loop boundaries operational_loop/read_write_loop/read_write_loop_design_loop_end
    L8........loop boundaries operational_loop/start_loop/start_loop_design_loop_begin
    L9........loop boundaries operational_loop/start_loop/start_loop_design_loop_end
    L10.......loop boundaries operational_loop/read_write_loop/read_write_loop_design_loop_cont
    L11.......loop boundaries operational_loop/read_write_loop/EXIT_L49
    L12.......loop boundaries operational_loop/start_loop/start_loop_design_loop_cont
    L13.......loop boundaries operational_loop/start_loop/EXIT_L38
    R38.......1-bit read operational_loop/start_loop/start_38
    R42.......8-bit read operational_loop/threshold_thresh1
    R45.......8-bit read operational_loop/threshold_thresh2
    R54.......1-bit read operational_loop/read_write_loop/use_thresh_offset_54
    W30.......1-bit write done_30
    W31.......1-bit write busy_31
    W32.......16-bit write cell_out_32
    W33.......1-bit write cell_out_valid_33
    W43.......1-bit write operational_loop/busy_43
    W60.......16-bit write operational_loop/read_write_loop/cell_out_60
    W61.......1-bit write operational_loop/read_write_loop/cell_out_valid_61
    W63.......1-bit write operational_loop/read_write_loop/cell_out_valid_valid0
    W67.......1-bit write operational_loop/done_assert_done
    W68.......1-bit write operational_loop/busy_68
    W70.......1-bit write operational_loop/done_70
    o49.......(7_7->7)-bit ADD_UNS_OP operational_loop/read_write_loop/add_49
    o51.......(7_8->8)-bit ADD_UNS_OP operational_loop/read_write_loop/add_mem_read2
    o55.......(16_16->16)-bit ADD_UNS_OP operational_loop/read_write_loop/add_55
    o59.......(7_8->8)-bit ADD_UNS_OP operational_loop/read_write_loop/add_mem_write
    o81.......(16_16->16)-bit ADD_UNS_OP operational_loop/calc_offset_46/add_81
    o49a......(7_7->1)-bit LEQ_UNS_OP operational_loop/read_write_loop/lte_49
    o81a......(8_8->16)-bit MULT_UNS_OP operational_loop/calc_offset_46/mul_81
    o81b......(16_16->16)-bit ADD_UNS_OP operational_loop/read_write_loop/calc_offset_53/add_81
    o81c......(8_8->16)-bit MULT_UNS_OP operational_loop/read_write_loop/calc_offset_53/mul_81
    oA........(0->16)-bit MEM_READ_SEQ_OP_read_cs_rr100x50_state_1 operational_loop/read_write_loop/cell_read_mem_read2/seq_cell_5
    oB........(8_0)-bit MEM_READ_SEQ_OP_read_cs_rr100x50_state_0 operational_loop/read_write_loop/cell_read_mem_read1/seq_cell_1
    oC........(0->16)-bit MEM_READ_SEQ_OP_read_cs_rr100x50_state_1 operational_loop/read_write_loop/cell_read_mem_read1/seq_cell_2
    oy........(8_16_0)-bit MEM_WRITE_SEQ_OP_write_cs_rr100x50_state_0 operational_loop/read_write_loop/cell_write_mem_write/seq_cell_7
    oz........(8_0)-bit MEM_READ_SEQ_OP_read_cs_rr100x50_state_0 operational_loop/read_write_loop/cell_read_mem_read2/seq_cell_4