mapped_fast.scr

design compile synthesis user guide

/*************************************************************/
/*  Script to create a Mapped view of the design  which is   */
/*  compatible with RTL Analyzer                             */
/*                                                           */
/*  1 command has been added to the original dc_shell script */
/*  to support the use of RTL Analyzer                       */
/*************************************************************

echo "Running GTECH to Mapped phase of design";

/* Optimise the GTECH design and map to gates */
compile;

check_design > report_dir + toplevel + "_fast_mapped_chk.rpt";

              /* RTL Analyzer specific */
/* Write out Mapped database and RTL Analyzer Project file, */
/* -dont_start option used to supress sarting the GUI       */
rtl_analyzer -output mapped_dir + toplevel + "_fast_mapped.db" \
             -project proj_dir + toplevel + "_fast_mapped.proj" \
             -dont_start;
  
report_timing > report_dir + toplevel + "_fast_timing.rpt";
    
report_area > report_dir + toplevel + "_fast_area.rpt";