📄 songer.tan.rpt
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; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\GenSpkS:Count11[9] ; Speakera:u3|FullSpkS ; CLK12MHZ ; CLK12MHZ ; None ; None ; 2.029 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\GenSpkS:Count11[5] ; Speakera:u3|FullSpkS ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.899 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\GenSpkS:Count11[1] ; Speakera:u3|FullSpkS ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.863 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\GenSpkS:Count11[10] ; Speakera:u3|FullSpkS ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.835 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\GenSpkS:Count11[7] ; Speakera:u3|FullSpkS ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.787 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\GenSpkS:Count11[8] ; Speakera:u3|FullSpkS ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.376 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[0] ; Speakera:u3|\DivideCLK:Count4[3] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.297 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[2] ; Speakera:u3|\DivideCLK:Count4[2] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.286 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DelaySpkS:Count2 ; Speakera:u3|\DelaySpkS:Count2 ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.014 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[1] ; Speakera:u3|\DivideCLK:Count4[1] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.144 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[1] ; Speakera:u3|\DivideCLK:Count4[2] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.142 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[3] ; Speakera:u3|\DivideCLK:Count4[3] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.136 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[0] ; Speakera:u3|\DivideCLK:Count4[2] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.055 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[0] ; Speakera:u3|\DivideCLK:Count4[1] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.054 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[1] ; Speakera:u3|\DivideCLK:Count4[3] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.053 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[0] ; Speakera:u3|\DivideCLK:Count4[0] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 1.050 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; Speakera:u3|\DivideCLK:Count4[2] ; Speakera:u3|\DivideCLK:Count4[3] ; CLK12MHZ ; CLK12MHZ ; None ; None ; 0.855 ns ;
+-------+------------------------------------------------+----------------------------------+----------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'CLK8HZ' ;
+-------+------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-------+------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_datain_reg0 ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_memory_reg0 ; CLK8HZ ; CLK8HZ ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_datain_reg1 ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_memory_reg1 ; CLK8HZ ; CLK8HZ ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_datain_reg2 ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_memory_reg2 ; CLK8HZ ; CLK8HZ ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_datain_reg3 ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_memory_reg3 ; CLK8HZ ; CLK8HZ ; None ; None ; 4.319 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[1] ; NoteTabs:u1|Counter[5] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.271 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[1] ; NoteTabs:u1|Counter[6] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.271 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[1] ; NoteTabs:u1|Counter[7] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.271 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[2] ; NoteTabs:u1|Counter[5] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.203 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[2] ; NoteTabs:u1|Counter[6] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.203 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[2] ; NoteTabs:u1|Counter[7] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.203 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[0] ; NoteTabs:u1|Counter[5] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.130 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[0] ; NoteTabs:u1|Counter[6] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.130 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[0] ; NoteTabs:u1|Counter[7] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.130 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[1] ; NoteTabs:u1|Counter[4] ; CLK8HZ ; CLK8HZ ; None ; None ; 2.056 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[2] ; NoteTabs:u1|Counter[4] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.986 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[1] ; NoteTabs:u1|Counter[3] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.976 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[3] ; NoteTabs:u1|Counter[5] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.974 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[3] ; NoteTabs:u1|Counter[6] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.974 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[3] ; NoteTabs:u1|Counter[7] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.974 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[4] ; NoteTabs:u1|Counter[5] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.935 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[4] ; NoteTabs:u1|Counter[6] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.935 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[4] ; NoteTabs:u1|Counter[7] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.935 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[0] ; NoteTabs:u1|Counter[4] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.913 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[2] ; NoteTabs:u1|Counter[3] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.906 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[6] ; NoteTabs:u1|Counter[7] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.903 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[1] ; NoteTabs:u1|Counter[2] ; CLK8HZ ; CLK8HZ ; None ; None ; 1.896 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[1] ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_address_reg1 ; CLK8HZ ; CLK8HZ ; None ; None ; 1.867 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[0] ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_address_reg0 ; CLK8HZ ; CLK8HZ ; None ; None ; 1.860 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[2] ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_address_reg2 ; CLK8HZ ; CLK8HZ ; None ; None ; 1.860 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[3] ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_address_reg3 ; CLK8HZ ; CLK8HZ ; None ; None ; 1.852 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[5] ; NoteTabs:u1|MUSIC:u1|altsyncram:altsyncram_component|altsyncram_k661:auto_generated|altsyncram_ruj2:altsyncram1|ram_block3a1~porta_address_reg5 ; CLK8HZ ; CLK8HZ ; None ; None ; 1.845 ns ;
; N/A ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; NoteTabs:u1|Counter[7] ; NoteTabs:u1|MUSIC:u1|⌨️ 快捷键说明
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