k20test.hif

只需要FPGA两个通用管脚

3
q1
-1
3
q0
-1
3
clock
-1
3
address6
-1
3
address5
-1
3
address4
-1
3
address3
-1
3
address2
-1
3
address1
-1
3
address0
-1
3
}
# include_file {
..|..|altera|quartus60|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
}
# hierarchies {
lpm_rom0:inst3
}
# end
# entity
altsyncram
# storage
db|k20test.(8).cnf
db|k20test.(8).cnf
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|altsyncram.tdf
c9a54fc8e33741c15b27e3d74d615aff
6
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
8
PARAMETER_UNKNOWN
USR
WIDTHAD_A
7
PARAMETER_UNKNOWN
USR
NUMWORDS_A
128
PARAMETER_UNKNOWN
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_UNKNOWN
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
k20test.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
BYPASS
PARAMETER_UNKNOWN
USR
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_q491
PARAMETER_UNKNOWN
USR
}
# used_port {
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# include_file {
..|..|altera|quartus60|libraries|megafunctions|lpm_mux.inc
c22bfd353214c01495b560fc34e47d79
..|..|altera|quartus60|libraries|megafunctions|stratix_ram_block.inc
2263a3bdfffeb150af977ee13902f70
..|..|altera|quartus60|libraries|megafunctions|altsyncram.inc
2d485e3cf75d4048974bdbf0d920cb89
..|..|altera|quartus60|libraries|megafunctions|altrom.inc
d4e3a69a331d3a99d3281790d99a1ebd
..|..|altera|quartus60|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
..|..|altera|quartus60|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
..|..|altera|quartus60|libraries|megafunctions|altram.inc
e66a83eccf6717bed97c99d891ad085
..|..|altera|quartus60|libraries|megafunctions|a_rdenreg.inc
60d229340bc3c24acb0a137b4849830
..|..|altera|quartus60|libraries|megafunctions|altdpram.inc
4e1931f9814db9f22f22b9eb377c65d6
..|..|altera|quartus60|libraries|megafunctions|altqpram.inc
74e08939f96a7ea8e7a4d59a5b01fe7
}
# hierarchies {
lpm_rom0:inst3|altsyncram:altsyncram_component
}
# end
# entity
altsyncram_q491
# storage
db|k20test.(9).cnf
db|k20test.(9).cnf
# case_insensitive
# source_file
db|altsyncram_q491.tdf
8086137a20837fd44726bbcc3092289
6
# used_port {
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
clock0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# hierarchies {
lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated
}
# end
# entity
sld_mod_ram_rom
# storage
db|k20test.(11).cnf
db|k20test.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_mod_ram_rom.vhd
cace3e25a569423fe6146c8930ac7b
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_node_info
135818752
PARAMETER_DEC
DEF
sld_ip_version
1
PARAMETER_DEC
DEF
sld_ip_minor_version
2
PARAMETER_DEC
DEF
sld_common_ip_version
0
PARAMETER_DEC
DEF
width_word
8
PARAMETER_UNKNOWN
USR
numwords
128
PARAMETER_UNKNOWN
USR
widthad
7
PARAMETER_UNKNOWN
USR
shift_count_bits
4
PARAMETER_UNKNOWN
USR
cvalue
00000000
PARAMETER_UNKNOWN
USR
is_data_in_ram
1
PARAMETER_UNKNOWN
USR
is_readable
1
PARAMETER_UNKNOWN
USR
node_name
0
PARAMETER_UNKNOWN
USR
}
# hierarchies {
lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2
}
# end
# entity
sld_rom_sr
# storage
db|k20test.(12).cnf
db|k20test.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_rom_sr.vhd
e685b197d41e27ef5fe9d8f6d2755ee3
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
48
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
 constraint(rom_data)
47 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr
}
# end
# entity
sld_hub
# storage
db|k20test.(13).cnf
db|k20test.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_hub.vhd
5510376c98712ae04829215cf7121b6
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
3
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone II
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
5
PARAMETER_UNKNOWN
USR
node_info
00001000000110000110111000000000
PARAMETER_BIN
USR
compilation_mode
0
PARAMETER_UNKNOWN
USR
}
# end
# entity
sld_jtag_state_machine
# storage
db|k20test.(14).cnf
db|k20test.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_hub.vhd
5510376c98712ae04829215cf7121b6
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
1
PARAMETER_DEC
USR
ip_minor_version
3
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
 constraint(jtag_state)
15 downto 0
PARAMETER_STRING
USR
}
# end
# entity
lpm_shiftreg
# storage
db|k20test.(15).cnf
db|k20test.(15).cnf
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|lpm_shiftreg.tdf
5c3a6ccfa9758137252ac34dcc2420
6
# user_parameter {
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
..|..|altera|quartus60|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
..|..|altera|quartus60|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
..|..|altera|quartus60|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
}
# end
# entity
lpm_decode
# storage
db|k20test.(16).cnf
db|k20test.(16).cnf
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|lpm_decode.tdf
2c635cd4e4aadce939ff33a1912efcc
6
# user_parameter {
LPM_WIDTH
3
PARAMETER_DEC
USR
LPM_DECODES
8
PARAMETER_DEC
USR
LPM_PIPELINE
1
PARAMETER_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_aoi
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
eq7
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# include_file {
..|..|altera|quartus60|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
..|..|altera|quartus60|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
..|..|altera|quartus60|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
..|..|altera|quartus60|libraries|megafunctions|declut.inc
b1d5939399e5c04dfe1d209af8cc490
..|..|altera|quartus60|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
}
# end
# entity
decode_aoi
# storage
db|k20test.(17).cnf
db|k20test.(17).cnf
# case_insensitive
# source_file
db|decode_aoi.tdf
a84699e748e49ea893573fab224714be
6
# used_port {
eq7
-1
3
eq6
-1
3
eq5
-1
3
eq4
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# end
# entity
sld_dffex
# storage
db|k20test.(18).cnf
db|k20test.(18).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
1
PARAMETER_DEC
USR
 constraint(d)
0 downto 0
PARAMETER_STRING
USR
 constraint(q)
0 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_dffex
# storage
db|k20test.(19).cnf
db|k20test.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
6
PARAMETER_DEC
USR
 constraint(d)
5 downto 0
PARAMETER_STRING
USR
 constraint(q)
5 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_dffex
# storage
db|k20test.(20).cnf
db|k20test.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
5
PARAMETER_DEC
USR
 constraint(d)
4 downto 0
PARAMETER_STRING
USR
 constraint(q)
4 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_rom_sr
# storage
db|k20test.(21).cnf
db|k20test.(21).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|..|altera|quartus60|libraries|megafunctions|sld_rom_sr.vhd
e685b197d41e27ef5fe9d8f6d2755ee3
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
64
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
 constraint(rom_data)
63 downto 0
PARAMETER_STRING
USR
}
# end
# entity
altpll0
# storage
db|k20test.(4).cnf
db|k20test.(4).cnf
# case_insensitive
# source_file
altpll0.tdf
9a684cd2619b7a3e34c5baf95a06858
6
# used_port {
inclk0
-1
3
c0
-1
3
}
# include_file {
..|..|altera|quartus60|libraries|megafunctions|altpll.inc
427889d09ade25892fb64d202ce46c
}
# hierarchies {
altpll0:inst1
}
# end
# entity
k20test
# storage
db|k20test.(0).cnf
db|k20test.(0).cnf
# case_insensitive
# source_file
k20test.bdf
d527a7843d3f23c41ffe7f9fe4431fd
24
# hierarchies {
|
}
# end
# entity
TENBASET_TxD
# storage
db|k20test.(2).cnf
db|k20test.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
k20test.v
321dbd7031dc98f122756df720f7aaf8
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
IPsource_1
202
PARAMETER_UNKNOWN
USR
IPsource_2
114
PARAMETER_UNKNOWN
USR
IPsource_3
251
PARAMETER_UNKNOWN
USR
IPsource_4
137
PARAMETER_UNKNOWN
USR
IPdestination_1
202
PARAMETER_UNKNOWN
USR
IPdestination_2
114
PARAMETER_UNKNOWN
USR
IPdestination_3
251
PARAMETER_UNKNOWN
USR
IPdestination_4
255
PARAMETER_UNKNOWN
USR
PhysicalAddress_1
00000000
PARAMETER_BIN
USR
PhysicalAddress_2
01000000
PARAMETER_BIN
USR
PhysicalAddress_3
11010000
PARAMETER_BIN
USR
PhysicalAddress_4
10010001
PARAMETER_BIN
USR
PhysicalAddress_5
01110110
PARAMETER_BIN
USR
PhysicalAddress_6
01110101
PARAMETER_BIN
USR
IPchecksum1
00000000000001000101000110101011
PARAMETER_BIN
DEF
IPchecksum2
00000000000000000101000110101111
PARAMETER_BIN
DEF
IPchecksum3
11111111111111111010111001010000
PARAMETER_BIN
DEF
}
# hierarchies {
TENBASET_TxD:inst
}
# end
# entity
altsyncram_uqe2
# storage
db|k20test.(10).cnf
db|k20test.(10).cnf
# case_insensitive
# source_file
db|altsyncram_uqe2.tdf
cc46c811236ca9c3ae82153fc1eff53
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
wren_b
-1
3
q_b7
-1
3
q_b6
-1
3
q_b5
-1
3
q_b4
-1
3
q_b3
-1
3
q_b2
-1
3
q_b1
-1
3
q_b0
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
data_b7
-1
3
data_b6
-1
3
data_b5
-1
3
data_b4
-1
3
data_b3
-1
3
data_b2
-1
3
data_b1
-1
3
data_b0
-1
3
clock1
-1
3
clock0
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
k20test.mif
5687b7e3612d5cdfbb426145a2b31384
}
# hierarchies {
lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1
}
# end
# complete