k20test.mif

只需要FPGA两个通用管脚

-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- Quartus II generated Memory Initialization File (.mif)

WIDTH=8;
DEPTH=256;

ADDRESS_RADIX=HEX;
DATA_RADIX=HEX;

CONTENT BEGIN
	[000..006]  :   55;
	007  :   D5;
	008  :   00;
	009  :   40;
	00A  :   D0;
	00B  :   91;
	00C  :   76;
	00D  :   75;
	00E  :   00;
	00F  :   12;
	010  :   34;
	011  :   56;
	012  :   78;
	013  :   90;
	014  :   08;
	015  :   00;
	016  :   45;
	[017..018]  :   00;
	019  :   2E;
	[01A..01D]  :   00;
	01E  :   80;
	01F  :   11;
	020  :   AE;
	021  :   50;
	022  :   CA;
	023  :   72;
	024  :   FB;
	025  :   89;
	026  :   CA;
	027  :   72;
	028  :   FB;
	029  :   FF;
	02A  :   04;
	02B  :   00;
	02C  :   04;
	[02D..02E]  :   00;
	02F  :   1A;
	[030..031]  :   00;
	032  :   36;
	033  :   2B;
	034  :   20;
	035  :   15;
	036  :   62;
	037  :   57;
	[038..039]  :   00;
	03A  :   23;
	03B  :   00;
	03C  :   73;
	03D  :   00;
	03E  :   80;
	03F  :   00;
	040  :   33;
	041  :   21;
	042  :   2C;
	043  :   FF;
	[044..0FF]  :   00;
END;