k20test.map.summary

只需要FPGA两个通用管脚

Analysis & Synthesis Status : Successful - Sat Aug 16 09:17:32 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : k20test
Top-level Entity Name : k20test
Family : Cyclone II
Total logic elements : 276
Total registers : 216
Total pins : 6
Total virtual pins : 0
Total memory bits : 1,024
Embedded Multiplier 9-bit elements : 0
Total PLLs : 1