k20test.tan.rpt

只需要FPGA两个通用管脚

+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                                                              ;
+---------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
; Clock Node Name                             ; Clock Setting Name ; Type       ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset    ; Phase offset ;
+---------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
; altpll0:inst1|altpll:altpll_component|_clk0 ;                    ; PLL output ; 20.0 MHz         ; 0.000 ns      ; 0.000 ns     ; clk      ; 2                     ; 5                   ; -2.616 ns ;              ;
; clk                                         ;                    ; User Pin   ; 50.0 MHz         ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
; altera_internal_jtag~TCKUTAP                ;                    ; User Pin   ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
+---------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'altpll0:inst1|altpll:altpll_component|_clk0'                                                                                                                                                                                                                                                                                                                                                                              ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------------------------------------------+--------------------------------------+---------------------------------------------+---------------------------------------------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                             ; To                                   ; From Clock                                  ; To Clock                                    ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------------------------------------------+--------------------------------------+---------------------------------------------+---------------------------------------------+-----------------------------+---------------------------+-------------------------+
; 5.503 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[7] ; TENBASET_TxD:inst|pkt_data[7]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.226 ns                ;
; 5.506 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[2] ; TENBASET_TxD:inst|pkt_data[2]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.223 ns                ;
; 5.596 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[6] ; TENBASET_TxD:inst|pkt_data[6]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.133 ns                ;
; 5.666 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[3] ; TENBASET_TxD:inst|pkt_data[3]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.063 ns                ;
; 5.667 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[0] ; TENBASET_TxD:inst|pkt_data[0]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.062 ns                ;
; 5.668 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[4] ; TENBASET_TxD:inst|pkt_data[4]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.061 ns                ;
; 5.669 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[1] ; TENBASET_TxD:inst|pkt_data[1]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.060 ns                ;
; 5.676 ns                                ; None                                                ; lpm_rom0:inst3|altsyncram:altsyncram_component|altsyncram_q491:auto_generated|altsyncram_uqe2:altsyncram1|q_a[5] ; TENBASET_TxD:inst|pkt_data[5]        ; clk                                         ; altpll0:inst1|altpll:altpll_component|_clk0 ; 7.384 ns                    ; 6.729 ns                  ; 1.053 ns                ;
; 45.447 ns                               ; 219.64 MHz ( period = 4.553 ns )                    ; TENBASET_TxD:inst|ShiftCount[2]                                                                                  ; TENBASET_TxD:inst|CRCflush           ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.733 ns                 ; 4.286 ns                ;
; 45.517 ns                               ; 223.06 MHz ( period = 4.483 ns )                    ; TENBASET_TxD:inst|ShiftCount[3]                                                                                  ; TENBASET_TxD:inst|CRCflush           ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.733 ns                 ; 4.216 ns                ;
; 45.651 ns                               ; 229.94 MHz ( period = 4.349 ns )                    ; TENBASET_TxD:inst|counter[15]                                                                                    ; TENBASET_TxD:inst|StartSending       ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.736 ns                 ; 4.085 ns                ;
; 45.699 ns                               ; 232.50 MHz ( period = 4.301 ns )                    ; TENBASET_TxD:inst|counter[13]                                                                                    ; TENBASET_TxD:inst|StartSending       ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.736 ns                 ; 4.037 ns                ;
; 45.753 ns                               ; 235.46 MHz ( period = 4.247 ns )                    ; TENBASET_TxD:inst|ShiftCount[1]                                                                                  ; TENBASET_TxD:inst|CRCflush           ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.733 ns                 ; 3.980 ns                ;
; 45.792 ns                               ; 237.64 MHz ( period = 4.208 ns )                    ; TENBASET_TxD:inst|ShiftCount[2]                                                                                  ; TENBASET_TxD:inst|CRCinit            ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.733 ns                 ; 3.941 ns                ;
; 45.843 ns                               ; 240.56 MHz ( period = 4.157 ns )                    ; TENBASET_TxD:inst|ShiftCount[2]                                                                                  ; TENBASET_TxD:inst|SendingPacket      ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.733 ns                 ; 3.890 ns                ;
; 45.862 ns                               ; 241.66 MHz ( period = 4.138 ns )                    ; TENBASET_TxD:inst|ShiftCount[3]                                                                                  ; TENBASET_TxD:inst|CRCinit            ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.733 ns                 ; 3.871 ns                ;
; 45.862 ns                               ; 241.66 MHz ( period = 4.138 ns )                    ; TENBASET_TxD:inst|counter[10]                                                                                    ; TENBASET_TxD:inst|StartSending       ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.734 ns                 ; 3.872 ns                ;
; 45.913 ns                               ; 244.68 MHz ( period = 4.087 ns )                    ; TENBASET_TxD:inst|ShiftCount[3]                                                                                  ; TENBASET_TxD:inst|SendingPacket      ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.733 ns                 ; 3.820 ns                ;
; 45.915 ns                               ; 244.80 MHz ( period = 4.085 ns )                    ; TENBASET_TxD:inst|counter[14]                                                                                    ; TENBASET_TxD:inst|StartSending       ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.736 ns                 ; 3.821 ns                ;
; 45.918 ns                               ; 244.98 MHz ( period = 4.082 ns )                    ; TENBASET_TxD:inst|counter[1]                                                                                     ; TENBASET_TxD:inst|counter[23]        ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.734 ns                 ; 3.816 ns                ;
; 45.924 ns                               ; 245.34 MHz ( period = 4.076 ns )                    ; TENBASET_TxD:inst|LinkPulseCount[7]                                                                              ; TENBASET_TxD:inst|LinkPulse          ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.741 ns                 ; 3.817 ns                ;
; 45.973 ns                               ; 248.32 MHz ( period = 4.027 ns )                    ; TENBASET_TxD:inst|counter[0]                                                                                     ; TENBASET_TxD:inst|counter[23]        ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.734 ns                 ; 3.761 ns                ;
; 46.004 ns                               ; 250.25 MHz ( period = 3.996 ns )                    ; TENBASET_TxD:inst|counter[2]                                                                                     ; TENBASET_TxD:inst|counter[23]        ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.734 ns                 ; 3.730 ns                ;
; 46.004 ns                               ; 250.25 MHz ( period = 3.996 ns )                    ; TENBASET_TxD:inst|counter[1]                                                                                     ; TENBASET_TxD:inst|counter[22]        ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.734 ns                 ; 3.730 ns                ;
; 46.059 ns                               ; 253.74 MHz ( period = 3.941 ns )                    ; TENBASET_TxD:inst|counter[0]                                                                                     ; TENBASET_TxD:inst|counter[22]        ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.734 ns                 ; 3.675 ns                ;
; 46.068 ns                               ; 254.32 MHz ( period = 3.932 ns )                    ; TENBASET_TxD:inst|counter[4]                                                                                     ; TENBASET_TxD:inst|StartSending       ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.734 ns                 ; 3.666 ns                ;
; 46.089 ns                               ; 255.69 MHz ( period = 3.911 ns )                    ; TENBASET_TxD:inst|rdaddress[5]                                                                                   ; TENBASET_TxD:inst|pkt_data[4]        ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.735 ns                 ; 3.646 ns                ;
; 46.090 ns                               ; 255.75 MHz ( period = 3.910 ns )                    ; TENBASET_TxD:inst|rdaddress[5]                                                                                   ; TENBASET_TxD:inst|pkt_data[3]        ; altpll0:inst1|altpll:altpll_component|_clk0 ; altpll0:inst1|altpll:altpll_component|_clk0 ; 50.000 ns                   ; 49.735 ns                 ; 3.645 ns                ;