songer.map.qmsg

乐曲硬件演奏电路设计的全部VHDL代码

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Nov 09 14:07:14 2007 " "Info: Processing started: Fri Nov 09 14:07:14 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off Songer -c Songer " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off Songer -c Songer" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "music.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file music.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 music-SYN " "Info: Found design unit 1: music-SYN" {  } { { "music.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/music.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 music " "Info: Found entity 1: music" {  } { { "music.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/music.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Songer.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file Songer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Songer-one " "Info: Found design unit 1: Songer-one" {  } { { "Songer.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/Songer.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 Songer " "Info: Found entity 1: Songer" {  } { { "Songer.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/Songer.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Speakera.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file Speakera.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Speakera-one " "Info: Found design unit 1: Speakera-one" {  } { { "Speakera.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/Speakera.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 Speakera " "Info: Found entity 1: Speakera" {  } { { "Speakera.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/Speakera.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ToneTaba.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ToneTaba.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ToneTaba-one " "Info: Found design unit 1: ToneTaba-one" {  } { { "ToneTaba.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/ToneTaba.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 ToneTaba " "Info: Found entity 1: ToneTaba" {  } { { "ToneTaba.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/ToneTaba.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "NoteTabs.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file NoteTabs.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 NoteTabs-one " "Info: Found design unit 1: NoteTabs-one" {  } { { "NoteTabs.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/NoteTabs.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 NoteTabs " "Info: Found entity 1: NoteTabs" {  } { { "NoteTabs.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/NoteTabs.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "Songer " "Info: Elaborating entity \"Songer\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WVRFX_VRFC_OBJECT_ASSIGNED_NOT_READ" "CODE1 Songer.vhd(29) " "Warning (10036): Verilog HDL or VHDL warning at Songer.vhd(29): object \"CODE1\" assigned a value but never read" {  } { { "Songer.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/Songer.vhd" 29 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "NoteTabs NoteTabs:u1 " "Info: Elaborating entity \"NoteTabs\" for hierarchy \"NoteTabs:u1\"" {  } { { "Songer.vhd" "u1" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/Songer.vhd" 31 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "music NoteTabs:u1\|music:u1 " "Info: Elaborating entity \"music\" for hierarchy \"NoteTabs:u1\|music:u1\"" {  } { { "NoteTabs.vhd" "u1" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/NoteTabs.vhd" 21 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_rom " "Info: Found entity 1: lpm_rom" {  } { { "lpm_rom.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf" 41 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_rom NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component " "Info: Elaborating entity \"lpm_rom\" for hierarchy \"NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\"" {  } { { "music.vhd" "lpm_rom_component" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/music.vhd" 75 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component " "Info: Elaborated megafunction instantiation \"NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\"" {  } { { "music.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/music.vhd" 75 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus60/libraries/megafunctions/altrom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/altrom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altrom " "Info: Found entity 1: altrom" {  } { { "altrom.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/altrom.tdf" 75 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altrom NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom " "Info: Elaborating entity \"altrom\" for hierarchy \"NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\"" {  } { { "lpm_rom.tdf" "srom" { Text "d:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf" 52 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component " "Info: Elaborated megafunction instantiation \"NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\|altrom:srom\", which is child of megafunction instantiation \"NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\"" {  } { { "lpm_rom.tdf" "" { Text "d:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf" 52 3 0 } } { "music.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/music.vhd" 75 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component " "Info: Instantiated megafunction \"NoteTabs:u1\|music:u1\|lpm_rom:lpm_rom_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family ACEX1K " "Info: Parameter \"intended_device_family\" = \"ACEX1K\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_address_control REGISTERED " "Info: Parameter \"lpm_address_control\" = \"REGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_file ./data/DATA_MIF.mif " "Info: Parameter \"lpm_file\" = \"./data/DATA_MIF.mif\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_outdata UNREGISTERED " "Info: Parameter \"lpm_outdata\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type LPM_ROM " "Info: Parameter \"lpm_type\" = \"LPM_ROM\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_width 4 " "Info: Parameter \"lpm_width\" = \"4\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widthad 8 " "Info: Parameter \"lpm_widthad\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "music.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/music.vhd" 75 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ToneTaba ToneTaba:u2 " "Info: Elaborating entity \"ToneTaba\" for hierarchy \"ToneTaba:u2\"" {  } { { "Songer.vhd" "u2" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/Songer.vhd" 32 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "Tone ToneTaba.vhd(11) " "Warning (10631): VHDL Process Statement warning at ToneTaba.vhd(11): inferring latch(es) for signal or variable \"Tone\", which holds its previous value in one or more paths through the process" {  } { { "ToneTaba.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/ToneTaba.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "CODE ToneTaba.vhd(11) " "Warning (10631): VHDL Process Statement warning at ToneTaba.vhd(11): inferring latch(es) for signal or variable \"CODE\", which holds its previous value in one or more paths through the process" {  } { { "ToneTaba.vhd" "" { Text "F:/课程/电子设计自动化/2007年秋季/乐曲硬件演奏电路设计QuartusVHDL/data/ToneTaba.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}