sel_clock.pin

基于vriloge的数字钟具有调时、分、秒和定时报警功能

-- Copyright (C) 1988-2002 Altera Corporation
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-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
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N.C. = No Connect. This pin has no internal connection to the device.
VCC = Dedicated power pin, which MUST be connected to VCC.
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

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CHIP "sel_clock" ASSIGNED TO AN EPM7032SLC44-5
C0                               : 1
C1                               : 2
VCC                              : 3
E0                               : 4
E1                               : 5
E2                               : 6
TDI                              : 7
E3                               : 8
F0                               : 9
GND                              : 10
F1                               : 11
F2                               : 12
TMS                              : 13
F3                               : 14
VCC                              : 15
A0                               : 16
D3                               : 17
D2                               : 18
D1                               : 19
A3                               : 20
A2                               : 21
GND                              : 22
VCC                              : 23
out0                             : 24
C2                               : 25
sel0                             : 26
out3                             : 27
out2                             : 28
B3                               : 29
GND                              : 30
sel1                             : 31
TCK                              : 32
sel2                             : 33
D0                               : 34
VCC                              : 35
B2                               : 36
B1                               : 37
TDO                              : 38
C3                               : 39
B0                               : 40
out1                             : 41
GND                              : 42
ckosp                            : 43
A1                               : 44