max_atoms.vhd
来自「一个非常好的dc使用书籍 一个非常好的dc使用书籍」· VHDL 代码 · 共 1,251 行 · 第 1/5 页
VHD
1,251 行
tpd_clk_regout_posedge : VitalDelayType01 := DefPropDelay01;
tpd_pclk_fbkout_posedge : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tpd_pena_fbkout_posedge : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tpd_paclr_fbkout_posedge : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tpd_papre_fbkout_posedge : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tpd_aclr_fbkout_posedge : VitalDelayType01 := DefPropDelay01;
tpd_clk_fbkout_posedge : VitalDelayType01 := DefPropDelay01;
tsetup_datain_clk_noedge_posedge : VitalDelayType := DefSetupHoldCnst;
tsetup_pena_clk_noedge_posedge : VitalDelayArrayType(51 downto 0) := (OTHERS => DefSetupHoldCnst);
tsetup_datain_pclk_noedge_posedge : VitalDelayArrayType(51 downto 0) := (OTHERS => DefSetupHoldCnst);
thold_datain_clk_noedge_posedge : VitalDelayType := DefSetupHoldCnst;
thold_pena_clk_noedge_posedge : VitalDelayArrayType(51 downto 0) := (OTHERS => DefSetupHoldCnst);
thold_datain_pclk_noedge_posedge : VitalDelayArrayType(51 downto 0) := (OTHERS => DefSetupHoldCnst);
tipd_pclk : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tipd_pena : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tipd_paclr : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tipd_papre : VitalDelayArrayType01(51 downto 0) := (OTHERS => DefPropDelay01);
tipd_clk : VitalDelayType01 := DefPropDelay01;
tipd_aclr : VitalDelayType01 := DefPropDelay01);
port ( datain : in std_logic;
clk : in std_logic;
aclr : in std_logic := '0';
pclk : in std_logic_vector(51 downto 0) := "1111111111111111111111111111111111111111111111111111";
pena : in std_logic_vector(51 downto 0) := "1111111111111111111111111111111111111111111111111111";
paclr : in std_logic_vector(51 downto 0) := "1111111111111111111111111111111111111111111111111111";
papre : in std_logic_vector(51 downto 0) := "1111111111111111111111111111111111111111111111111111";
regout : out std_logic;
fbkout : out std_logic);
attribute VITAL_LEVEL0 of max_mcell_register : entity is TRUE;
end max_mcell_register;
architecture vital_mcell_reg of max_mcell_register is
attribute VITAL_LEVEL0 of vital_mcell_reg : architecture is TRUE;
signal pclk_ipd :std_logic_vector(51 downto 0) := (OTHERS => 'U');
signal pena_ipd :std_logic_vector(51 downto 0) := (OTHERS => 'U');
signal paclr_ipd :std_logic_vector(51 downto 0) := (OTHERS => 'U');
signal papre_ipd :std_logic_vector(51 downto 0) := (OTHERS => '0');
signal clk_ipd :std_ulogic := 'U';
signal aclr_ipd :std_ulogic := 'U';
signal ena_ipd :std_ulogic := '1';
signal ptermclk :std_ulogic := '0';
signal penable :std_ulogic := '1';
begin
---------------------
-- INPUT PATH DELAYs
---------------------
WireDelay : block
begin
VitalWireDelay (pclk_ipd(0), pclk(0), tipd_pclk(0));
VitalWireDelay (pclk_ipd(1), pclk(1), tipd_pclk(1));
VitalWireDelay (pclk_ipd(2), pclk(2), tipd_pclk(2));
VitalWireDelay (pclk_ipd(3), pclk(3), tipd_pclk(3));
VitalWireDelay (pclk_ipd(4), pclk(4), tipd_pclk(4));
VitalWireDelay (pclk_ipd(5), pclk(5), tipd_pclk(5));
VitalWireDelay (pclk_ipd(6), pclk(6), tipd_pclk(6));
VitalWireDelay (pclk_ipd(7), pclk(7), tipd_pclk(7));
VitalWireDelay (pclk_ipd(8), pclk(8), tipd_pclk(8));
VitalWireDelay (pclk_ipd(9), pclk(9), tipd_pclk(9));
VitalWireDelay (pclk_ipd(10), pclk(10), tipd_pclk(10));
VitalWireDelay (pclk_ipd(11), pclk(11), tipd_pclk(11));
VitalWireDelay (pclk_ipd(12), pclk(12), tipd_pclk(12));
VitalWireDelay (pclk_ipd(13), pclk(13), tipd_pclk(13));
VitalWireDelay (pclk_ipd(14), pclk(14), tipd_pclk(14));
VitalWireDelay (pclk_ipd(15), pclk(15), tipd_pclk(15));
VitalWireDelay (pclk_ipd(16), pclk(16), tipd_pclk(16));
VitalWireDelay (pclk_ipd(17), pclk(17), tipd_pclk(17));
VitalWireDelay (pclk_ipd(18), pclk(18), tipd_pclk(18));
VitalWireDelay (pclk_ipd(19), pclk(19), tipd_pclk(19));
VitalWireDelay (pclk_ipd(20), pclk(20), tipd_pclk(20));
VitalWireDelay (pclk_ipd(21), pclk(21), tipd_pclk(21));
VitalWireDelay (pclk_ipd(22), pclk(22), tipd_pclk(22));
VitalWireDelay (pclk_ipd(23), pclk(23), tipd_pclk(23));
VitalWireDelay (pclk_ipd(24), pclk(24), tipd_pclk(24));
VitalWireDelay (pclk_ipd(25), pclk(25), tipd_pclk(25));
VitalWireDelay (pclk_ipd(26), pclk(26), tipd_pclk(26));
VitalWireDelay (pclk_ipd(27), pclk(27), tipd_pclk(27));
VitalWireDelay (pclk_ipd(28), pclk(28), tipd_pclk(28));
VitalWireDelay (pclk_ipd(29), pclk(29), tipd_pclk(29));
VitalWireDelay (pclk_ipd(30), pclk(30), tipd_pclk(30));
VitalWireDelay (pclk_ipd(31), pclk(31), tipd_pclk(31));
VitalWireDelay (pclk_ipd(32), pclk(32), tipd_pclk(32));
VitalWireDelay (pclk_ipd(33), pclk(33), tipd_pclk(33));
VitalWireDelay (pclk_ipd(34), pclk(34), tipd_pclk(34));
VitalWireDelay (pclk_ipd(35), pclk(35), tipd_pclk(35));
VitalWireDelay (pclk_ipd(36), pclk(36), tipd_pclk(36));
VitalWireDelay (pclk_ipd(37), pclk(37), tipd_pclk(37));
VitalWireDelay (pclk_ipd(38), pclk(38), tipd_pclk(38));
VitalWireDelay (pclk_ipd(39), pclk(39), tipd_pclk(39));
VitalWireDelay (pclk_ipd(40), pclk(40), tipd_pclk(40));
VitalWireDelay (pclk_ipd(41), pclk(41), tipd_pclk(41));
VitalWireDelay (pclk_ipd(42), pclk(42), tipd_pclk(42));
VitalWireDelay (pclk_ipd(43), pclk(43), tipd_pclk(43));
VitalWireDelay (pclk_ipd(44), pclk(44), tipd_pclk(44));
VitalWireDelay (pclk_ipd(45), pclk(45), tipd_pclk(45));
VitalWireDelay (pclk_ipd(46), pclk(46), tipd_pclk(46));
VitalWireDelay (pclk_ipd(47), pclk(47), tipd_pclk(47));
VitalWireDelay (pclk_ipd(48), pclk(48), tipd_pclk(48));
VitalWireDelay (pclk_ipd(49), pclk(49), tipd_pclk(49));
VitalWireDelay (pclk_ipd(50), pclk(50), tipd_pclk(50));
VitalWireDelay (pclk_ipd(51), pclk(51), tipd_pclk(51));
VitalWireDelay (pena_ipd(0), pena(0), tipd_pena(0));
VitalWireDelay (pena_ipd(1), pena(1), tipd_pena(1));
VitalWireDelay (pena_ipd(2), pena(2), tipd_pena(2));
VitalWireDelay (pena_ipd(3), pena(3), tipd_pena(3));
VitalWireDelay (pena_ipd(4), pena(4), tipd_pena(4));
VitalWireDelay (pena_ipd(5), pena(5), tipd_pena(5));
VitalWireDelay (pena_ipd(6), pena(6), tipd_pena(6));
VitalWireDelay (pena_ipd(7), pena(7), tipd_pena(7));
VitalWireDelay (pena_ipd(8), pena(8), tipd_pena(8));
VitalWireDelay (pena_ipd(9), pena(9), tipd_pena(9));
VitalWireDelay (pena_ipd(10), pena(10), tipd_pena(10));
VitalWireDelay (pena_ipd(11), pena(11), tipd_pena(11));
VitalWireDelay (pena_ipd(12), pena(12), tipd_pena(12));
VitalWireDelay (pena_ipd(13), pena(13), tipd_pena(13));
VitalWireDelay (pena_ipd(14), pena(14), tipd_pena(14));
VitalWireDelay (pena_ipd(15), pena(15), tipd_pena(15));
VitalWireDelay (pena_ipd(16), pena(16), tipd_pena(16));
VitalWireDelay (pena_ipd(17), pena(17), tipd_pena(17));
VitalWireDelay (pena_ipd(18), pena(18), tipd_pena(18));
VitalWireDelay (pena_ipd(19), pena(19), tipd_pena(19));
VitalWireDelay (pena_ipd(20), pena(20), tipd_pena(20));
VitalWireDelay (pena_ipd(21), pena(21), tipd_pena(21));
VitalWireDelay (pena_ipd(22), pena(22), tipd_pena(22));
VitalWireDelay (pena_ipd(23), pena(23), tipd_pena(23));
VitalWireDelay (pena_ipd(24), pena(24), tipd_pena(24));
VitalWireDelay (pena_ipd(25), pena(25), tipd_pena(25));
VitalWireDelay (pena_ipd(26), pena(26), tipd_pena(26));
VitalWireDelay (pena_ipd(27), pena(27), tipd_pena(27));
VitalWireDelay (pena_ipd(28), pena(28), tipd_pena(28));
VitalWireDelay (pena_ipd(29), pena(29), tipd_pena(29));
VitalWireDelay (pena_ipd(30), pena(30), tipd_pena(30));
VitalWireDelay (pena_ipd(31), pena(31), tipd_pena(31));
VitalWireDelay (pena_ipd(32), pena(32), tipd_pena(32));
VitalWireDelay (pena_ipd(33), pena(33), tipd_pena(33));
VitalWireDelay (pena_ipd(34), pena(34), tipd_pena(34));
VitalWireDelay (pena_ipd(35), pena(35), tipd_pena(35));
VitalWireDelay (pena_ipd(36), pena(36), tipd_pena(36));
VitalWireDelay (pena_ipd(37), pena(37), tipd_pena(37));
VitalWireDelay (pena_ipd(38), pena(38), tipd_pena(38));
VitalWireDelay (pena_ipd(39), pena(39), tipd_pena(39));
VitalWireDelay (pena_ipd(40), pena(40), tipd_pena(40));
VitalWireDelay (pena_ipd(41), pena(41), tipd_pena(41));
VitalWireDelay (pena_ipd(42), pena(42), tipd_pena(42));
VitalWireDelay (pena_ipd(43), pena(43), tipd_pena(43));
VitalWireDelay (pena_ipd(44), pena(44), tipd_pena(44));
VitalWireDelay (pena_ipd(45), pena(45), tipd_pena(45));
VitalWireDelay (pena_ipd(46), pena(46), tipd_pena(46));
VitalWireDelay (pena_ipd(47), pena(47), tipd_pena(47));
VitalWireDelay (pena_ipd(48), pena(48), tipd_pena(48));
VitalWireDelay (pena_ipd(49), pena(49), tipd_pena(49));
VitalWireDelay (pena_ipd(50), pena(50), tipd_pena(50));
VitalWireDelay (pena_ipd(51), pena(51), tipd_pena(51));
VitalWireDelay (paclr_ipd(0), paclr(0), tipd_paclr(0));
VitalWireDelay (paclr_ipd(1), paclr(1), tipd_paclr(1));
VitalWireDelay (paclr_ipd(2), paclr(2), tipd_paclr(2));
VitalWireDelay (paclr_ipd(3), paclr(3), tipd_paclr(3));
VitalWireDelay (paclr_ipd(4), paclr(4), tipd_paclr(4));
VitalWireDelay (paclr_ipd(5), paclr(5), tipd_paclr(5));
VitalWireDelay (paclr_ipd(6), paclr(6), tipd_paclr(6));
VitalWireDelay (paclr_ipd(7), paclr(7), tipd_paclr(7));
VitalWireDelay (paclr_ipd(8), paclr(8), tipd_paclr(8));
VitalWireDelay (paclr_ipd(9), paclr(9), tipd_paclr(9));
VitalWireDelay (paclr_ipd(10), paclr(10), tipd_paclr(10));
VitalWireDelay (paclr_ipd(11), paclr(11), tipd_paclr(11));
VitalWireDelay (paclr_ipd(12), paclr(12), tipd_paclr(12));
VitalWireDelay (paclr_ipd(13), paclr(13), tipd_paclr(13));
VitalWireDelay (paclr_ipd(14), paclr(14), tipd_paclr(14));
VitalWireDelay (paclr_ipd(15), paclr(15), tipd_paclr(15));
VitalWireDelay (paclr_ipd(16), paclr(16), tipd_paclr(16));
VitalWireDelay (paclr_ipd(17), paclr(17), tipd_paclr(17));
VitalWireDelay (paclr_ipd(18), paclr(18), tipd_paclr(18));
VitalWireDelay (paclr_ipd(19), paclr(19), tipd_paclr(19));
VitalWireDelay (paclr_ipd(20), paclr(20), tipd_paclr(20));
VitalWireDelay (paclr_ipd(21), paclr(21), tipd_paclr(21));
VitalWireDelay (paclr_ipd(22), paclr(22), tipd_paclr(22));
VitalWireDelay (paclr_ipd(23), paclr(23), tipd_paclr(23));
VitalWireDelay (paclr_ipd(24), paclr(24), tipd_paclr(24));
VitalWireDelay (paclr_ipd(25), paclr(25), tipd_paclr(25));
VitalWireDelay (paclr_ipd(26), paclr(26), tipd_paclr(26));
VitalWireDelay (paclr_ipd(27), paclr(27), tipd_paclr(27));
VitalWireDelay (paclr_ipd(28), paclr(28), tipd_paclr(28));
VitalWireDelay (paclr_ipd(29), paclr(29), tipd_paclr(29));
VitalWireDelay (paclr_ipd(30), paclr(30), tipd_paclr(30));
VitalWireDelay (paclr_ipd(31), paclr(31), tipd_paclr(31));
VitalWireDelay (paclr_ipd(32), paclr(32), tipd_paclr(32));
VitalWireDelay (paclr_ipd(33), paclr(33), tipd_paclr(33));
VitalWireDelay (paclr_ipd(34), paclr(34), tipd_paclr(34));
VitalWireDelay (paclr_ipd(35), paclr(35), tipd_paclr(35));
VitalWireDelay (paclr_ipd(36), paclr(36), tipd_paclr(36));
VitalWireDelay (paclr_ipd(37), paclr(37), tipd_paclr(37));
VitalWireDelay (paclr_ipd(38), paclr(38), tipd_paclr(38));
VitalWireDelay (paclr_ipd(39), paclr(39), tipd_paclr(39));
VitalWireDelay (paclr_ipd(40), paclr(40), tipd_paclr(40));
VitalWireDelay (paclr_ipd(41), paclr(41), tipd_paclr(41));
VitalWireDelay (paclr_ipd(42), paclr(42), tipd_paclr(42));
VitalWireDelay (paclr_ipd(43), paclr(43), tipd_paclr(43));
VitalWireDelay (paclr_ipd(44), paclr(44), tipd_paclr(44));
VitalWireDelay (paclr_ipd(45), paclr(45), tipd_paclr(45));
VitalWireDelay (paclr_ipd(46), paclr(46), tipd_paclr(46));
VitalWireDelay (paclr_ipd(47), paclr(47), tipd_paclr(47));
VitalWireDelay (paclr_ipd(48), paclr(48), tipd_paclr(48));
VitalWireDelay (paclr_ipd(49), paclr(49), tipd_paclr(49));
VitalWireDelay (paclr_ipd(50), paclr(50), tipd_paclr(50));
VitalWireDelay (paclr_ipd(51), paclr(51), tipd_paclr(51));
VitalWireDelay (papre_ipd(0), papre(0), tipd_papre(0));
VitalWireDelay (papre_ipd(1), papre(1), tipd_papre(1));
VitalWireDelay (papre_ipd(2), papre(2), tipd_papre(2));
VitalWireDelay (papre_ipd(3), papre(3), tipd_papre(3));
VitalWireDelay (papre_ipd(4), papre(4), tipd_papre(4));
VitalWireDelay (papre_ipd(5), papre(5), tipd_papre(5));
VitalWireDelay (papre_ipd(6), papre(6), tipd_papre(6));
VitalWireDelay (papre_ipd(7), papre(7), tipd_papre(7));
VitalWireDelay (papre_ipd(8), papre(8), tipd_papre(8));
VitalWireDelay (papre_ipd(9), papre(9), tipd_papre(9));
VitalWireDelay (papre_ipd(10), papre(10), tipd_papre(10));
VitalWireDelay (papre_ipd(11), papre(11), tipd_papre(11));
VitalWireDelay (papre_ipd(12), papre(12), tipd_papre(12));
VitalWireDelay (papre_ipd(13), papre(13), tipd_papre(13));
VitalWireDelay (papre_ipd(14), papre(14), tipd_papre(14));
VitalWireDelay (papre_ipd(15), papre(15), tipd_papre(15));
VitalWireDelay (papre_ipd(16), papre(16), tipd_papre(16));
VitalWireDelay (papre_ipd(17), papre(17), tipd_papre(17));
VitalWireDelay (papre_ipd(18), papre(18), tipd_papre(18));
VitalWireDelay (papre_ipd(19), papre(19), tipd_papre(19));
VitalWireDelay (papre_ipd(20), papre(20), tipd_papre(20));
VitalWireDelay (papre_ipd(21), papre(21), tipd_papre(21));
VitalWireDelay (papre_ipd(22), papre(22), tipd_papre(22));
VitalWireDelay (papre_ipd(23), papre(23), tipd_papre(23));
VitalWireDelay (papre_ipd(24), papre(24), tipd_papre(24));
VitalWireDelay (papre_ipd(25), papre(25), tipd_papre(25));
VitalWireDelay (papre_ipd(26), papre(26), tipd_papre(26));
VitalWireDelay (papre_ipd(27), papre(27), tipd_papre(27));
VitalWireDelay (papre_ipd(28), papre(28), tipd_papre(28));
VitalWireDelay (papre_ipd(29), papre(29), tipd_papre(29));
VitalWireDelay (papre_ipd(30), papre(30), tipd_papre(30));
VitalWireDelay (papre_ipd(31), papre(31), tipd_papre(31));
VitalWireDelay (papre_ipd(32), papre(32), tipd_papre(32));
VitalWireDelay (papre_ipd(33), papre(33), tipd_papre(33));
VitalWireDelay (papre_ipd(34), papre(34), tipd_papre(34));
VitalWireDelay (papre_ipd(35), papre(35), tipd_papre(35));
VitalWireDelay (papre_ipd(36), papre(36), tip⌨️ 快捷键说明
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