📄 cyclone_atoms.v
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reg icout, icout0, icout1, data, lut_data;
reg inverta_dataa;
buf (idataa, dataa);
buf (idatab, datab);
buf (idatac, datac);
buf (idatad, datad);
buf (icin, cin);
buf (icin0, cin0);
buf (icin1, cin1);
buf (iinverta, inverta);
specify
(dataa => combout) = (0, 0) ;
(datab => combout) = (0, 0) ;
(datac => combout) = (0, 0) ;
(datad => combout) = (0, 0) ;
(cin => combout) = (0, 0) ;
(cin0 => combout) = (0, 0) ;
(cin1 => combout) = (0, 0) ;
(inverta => combout) = (0, 0) ;
(qfbkin => combout) = (0, 0) ;
(dataa => cout) = (0, 0);
(datab => cout) = (0, 0);
(cin => cout) = (0, 0) ;
(cin0 => cout) = (0, 0) ;
(cin1 => cout) = (0, 0) ;
(inverta => cout) = (0, 0);
(dataa => cout0) = (0, 0);
(datab => cout0) = (0, 0);
(cin0 => cout0) = (0, 0) ;
(inverta => cout0) = (0, 0);
(dataa => cout1) = (0, 0);
(datab => cout1) = (0, 0);
(cin1 => cout1) = (0, 0) ;
(inverta => cout1) = (0, 0);
(dataa => regin) = (0, 0) ;
(datab => regin) = (0, 0) ;
(datac => regin) = (0, 0) ;
(datad => regin) = (0, 0) ;
(cin => regin) = (0, 0) ;
(cin0 => regin) = (0, 0) ;
(cin1 => regin) = (0, 0) ;
(inverta => regin) = (0, 0) ;
(qfbkin => regin) = (0, 0) ;
endspecify
function [16:1] str_to_bin ;
input [8*4:1] s;
reg [8*4:1] reg_s;
reg [4:1] digit [8:1];
reg [8:1] tmp;
integer m , ivalue ;
begin
ivalue = 0;
reg_s = s;
for (m=1; m<=4; m= m+1 )
begin
tmp = reg_s[32:25];
digit[m] = tmp & 8'b00001111;
reg_s = reg_s << 8;
if (tmp[7] == 'b1)
digit[m] = digit[m] + 9;
end
str_to_bin = {digit[1], digit[2], digit[3], digit[4]};
end
endfunction
function lut4 ;
input [4*8:1] lut_mask ;
input dataa, datab, datac, datad ;
reg [15:0] mask ;
reg prev_lut4;
reg dataa_new, datab_new, datac_new, datad_new;
integer h, i, j, k;
integer hn, in, jn, kn;
integer exitloop;
integer check_prev;
begin
mask = str_to_bin (lut_mask) ;
begin
if ((datad === 1'bx) || (datad === 1'bz))
begin
datad_new = 1'b0;
hn = 2;
end
else
begin
datad_new = datad;
hn = 1;
end
check_prev = 0;
exitloop = 0;
h = 1;
while ((h <= hn) && (exitloop == 0))
begin
if ((datac === 1'bx) || (datac === 1'bz))
begin
datac_new = 1'b0;
in = 2;
end
else
begin
datac_new = datac;
in = 1;
end
i = 1;
while ((i <= in) && (exitloop ==0))
begin
if ((datab === 1'bx) || (datab === 1'bz))
begin
datab_new = 1'b0;
jn = 2;
end
else
begin
datab_new = datab;
jn = 1;
end
j = 1;
while ((j <= jn) && (exitloop ==0))
begin
if ((dataa === 1'bx) || (dataa === 1'bz))
begin
dataa_new = 1'b0;
kn = 2;
end
else
begin
dataa_new = dataa;
kn = 1;
end
k = 1;
while ((k <= kn) && (exitloop ==0))
begin
case ({datad_new,
datac_new,
datab_new,
dataa_new})
4'b0000: lut4 = mask[0] ;
4'b0001: lut4 = mask[1] ;
4'b0010: lut4 = mask[2] ;
4'b0011: lut4 = mask[3] ;
4'b0100: lut4 = mask[4] ;
4'b0101: lut4 = mask[5] ;
4'b0110: lut4 = mask[6] ;
4'b0111: lut4 = mask[7] ;
4'b1000: lut4 = mask[8] ;
4'b1001: lut4 = mask[9] ;
4'b1010: lut4 = mask[10] ;
4'b1011: lut4 = mask[11] ;
4'b1100: lut4 = mask[12] ;
4'b1101: lut4 = mask[13] ;
4'b1110: lut4 = mask[14] ;
4'b1111: lut4 = mask[15] ;
default: $display ("Warning: Reached forbidden part of lcell code.\n");
endcase
if ((check_prev == 1) && (prev_lut4 !==lut4))
begin
lut4 = 1'bx;
exitloop = 1;
end
else
begin
check_prev = 1;
prev_lut4 = lut4;
end
k = k + 1;
dataa_new = 1'b1;
end // loop a
j = j + 1;
datab_new = 1'b1;
end // loop b
i = i + 1;
datac_new = 1'b1;
end // loop c
h = h + 1;
datad_new = 1'b1;
end // loop d
end
end
endfunction
always @(idatad or idatac or idatab or idataa or icin or
icin0 or icin1 or iinverta or qfbkin)
begin
if (iinverta === 'b1) //invert dataa
inverta_dataa = !idataa;
else
inverta_dataa = idataa;
if (operation_mode == "normal")
begin
if (sum_lutc_input == "datac")
begin
data = lut4(lut_mask, inverta_dataa, idatab, idatac, idatad);
end
else if ( sum_lutc_input == "cin" )
begin
if (cin0_used == "true" || cin1_used == "true")
begin
if (cin_used == "true")
data = (icin === 'b0) ?
lut4(lut_mask,
inverta_dataa,
idatab,
icin0,
idatad) :
lut4(lut_mask,
inverta_dataa,
idatab,
icin1,
idatad);
else // if cin is not used then inverta
// should be used in place of cin
data = (iinverta === 'b0) ?
lut4(lut_mask,
inverta_dataa,
idatab,
icin0,
idatad) :
lut4(lut_mask,
inverta_dataa,
idatab,
icin1,
idatad);
end
else
data = lut4(lut_mask, inverta_dataa, idatab, icin, idatad);
end
else if( sum_lutc_input == "qfbk")
begin
data = lut4(lut_mask, inverta_dataa, idatab, qfbkin, idatad);
end
end
else if (operation_mode == "arithmetic")
begin
// sum LUT
if (sum_lutc_input == "datac")
begin
data = lut4(lut_mask, inverta_dataa, idatab, idatac, 'b1);
end
else if ( sum_lutc_input == "cin" )
begin
if (cin0_used == "true" || cin1_used == "true")
begin
if (cin_used == "true")
data = (icin === 'b0) ?
lut4(lut_mask,
inverta_dataa,
idatab,
icin0,
'b1) :
lut4(lut_mask,
inverta_dataa,
idatab,
icin1,
'b1);
else // if cin is not used then inverta
// should be used in place of cin
data = (iinverta === 'b0) ?
lut4(lut_mask,
inverta_dataa,
idatab,
icin0,
'b1) :
lut4(lut_mask,
inverta_dataa,
idatab,
icin1,
'b1);
end
else
if ( cin_used == "true")
data = lut4(lut_mask, inverta_dataa, idatab, icin, 'b1);
else // cin is not used, inverta is used as cin
data = lut4(lut_mask, inverta_dataa, idatab,
iinverta, 'b1);
end
else if( sum_lutc_input == "qfbk")
begin
data = lut4(lut_mask, inverta_dataa, idatab, qfbkin, 'b1);
end
// carry LUT
icout0 = lut4(lut_mask, inverta_dataa, idatab, icin0, 'b0);
icout1 = lut4(lut_mask, inverta_dataa, idatab, icin1, 'b0);
if ( cin_used == "true" )
begin
if (cin0_used == "true" || cin1_used == "true")
icout = (icin === 'b0) ? icout0 : icout1;
else
icout = lut4(lut_mask, inverta_dataa, idatab, icin, 'b0);
end
else // inverta is used in place of cin
begin
if (cin0_used == "true" || cin1_used == "true")
icout = (iinverta === 'b0) ? icout0 : icout1;
else
icout = lut4(lut_mask,
inverta_dataa, idatab, iinverta, 'b0);
end
end
end
and (combout, data, 'b1) ;
and (cout, icout, 'b1) ;
and (cout0, icout0, 'b1) ;
and (cout1, icout1, 'b1) ;
and (regin, data, 'b1) ;
endmodule
///////////////////////////////////////////////////////////////////////////////
//
// CYCLONE_LCELL_REGISTER
//
///////////////////////////////////////////////////////////////////////////////
`timescale 1 ps/1 ps
module cyclone_lcell_register (clk, aclr, aload, sclr, sload, ena, datain,
datac, regcascin, devclrn, devpor, regout,
qfbkout) ;
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