second_count.map.qmsg

second.rar 这个做的是一秒表计时程序

{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_addr\[3\] second_count.v(63) " "Warning (10034): Output port \"usb_addr\[3\]\" at second_count.v(63) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 63 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_addr\[2\] second_count.v(63) " "Warning (10034): Output port \"usb_addr\[2\]\" at second_count.v(63) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 63 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_addr\[1\] second_count.v(63) " "Warning (10034): Output port \"usb_addr\[1\]\" at second_count.v(63) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 63 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_addr\[0\] second_count.v(63) " "Warning (10034): Output port \"usb_addr\[0\]\" at second_count.v(63) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 63 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_rst_n second_count.v(67) " "Warning (10034): Output port \"usb_rst_n\" at second_count.v(67) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 67 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_cs_n second_count.v(68) " "Warning (10034): Output port \"usb_cs_n\" at second_count.v(68) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 68 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_rd_n second_count.v(69) " "Warning (10034): Output port \"usb_rd_n\" at second_count.v(69) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 69 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Warning" "WVRFX_L2_VRFC_DRIVERLESS_OUTPUT_PORT" "usb_wr_n second_count.v(72) " "Warning (10034): Output port \"usb_wr_n\" at second_count.v(72) has no driver" {  } { { "second_count.v" "" { Text "D:/lts/library/Second/second_count.v" 72 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_fp LPM_fp:LPM_fp_inst " "Info: Elaborating entity \"LPM_fp\" for hierarchy \"LPM_fp:LPM_fp_inst\"" {  } { { "second_count.v" "LPM_fp_inst" { Text "D:/lts/library/Second/second_count.v" 108 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf" 247 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter LPM_fp:LPM_fp_inst\|lpm_counter:lpm_counter_component " "Info: Elaborating entity \"lpm_counter\" for hierarchy \"LPM_fp:LPM_fp_inst\|lpm_counter:lpm_counter_component\"" {  } { { "LPM_fp.v" "lpm_counter_component" { Text "D:/lts/library/Second/LPM_fp.v" 68 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "LPM_fp:LPM_fp_inst\|lpm_counter:lpm_counter_component " "Info: Elaborated megafunction instantiation \"LPM_fp:LPM_fp_inst\|lpm_counter:lpm_counter_component\"" {  } { { "LPM_fp.v" "" { Text "D:/lts/library/Second/LPM_fp.v" 68 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_6ej.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_6ej.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_6ej " "Info: Found entity 1: cntr_6ej" {  } { { "db/cntr_6ej.tdf" "" { Text "D:/lts/library/Second/db/cntr_6ej.tdf" 25 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cntr_6ej LPM_fp:LPM_fp_inst\|lpm_counter:lpm_counter_component\|cntr_6ej:auto_generated " "Info: Elaborating entity \"cntr_6ej\" for hierarchy \"LPM_fp:LPM_fp_inst\|lpm_counter:lpm_counter_component\|cntr_6ej:auto_generated\"" {  } { { "lpm_counter.tdf" "auto_generated" { Text "c:/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf" 271 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decode_7 decode_7:decode_7_inst " "Info: Elaborating entity \"decode_7\" for hierarchy \"decode_7:decode_7_inst\"" {  } { { "second_count.v" "decode_7_inst" { Text "D:/lts/library/Second/second_count.v" 114 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_4_1 mux_4_1:mux_4_1_inst " "Info: Elaborating entity \"mux_4_1\" for hierarchy \"mux_4_1:mux_4_1_inst\"" {  } { { "second_count.v" "mux_4_1_inst" { Text "D:/lts/library/Second/second_count.v" 121 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain mux_4_1.v(11) " "Warning (10235): Verilog HDL Always Construct warning at mux_4_1.v(11): variable \"datain\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 11 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain mux_4_1.v(12) " "Warning (10235): Verilog HDL Always Construct warning at mux_4_1.v(12): variable \"datain\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 12 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain mux_4_1.v(13) " "Warning (10235): Verilog HDL Always Construct warning at mux_4_1.v(13): variable \"datain\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 13 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain mux_4_1.v(14) " "Warning (10235): Verilog HDL Always Construct warning at mux_4_1.v(14): variable \"datain\" is read inside the Always Construct but isn't in the Always Construct's Event Control" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 14 0 0 } }  } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable \"%1!s!\" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0}
{ "Warning" "WVRFX_L2_VERI_INCOMPLETE_CASE_STATEMENT" "mux_4_1.v(10) " "Warning (10270): Verilog HDL Case Statement warning at mux_4_1.v(10): incomplete case statement has no default case item" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 10 0 0 } }  } 0 10270 "Verilog HDL Case Statement warning at %1!s!: incomplete case statement has no default case item" 0 0}
{ "Info" "IVRFX_VERI_ALMOST_ONEHOT_CASE_STATEMENT" "mux_4_1.v(10) " "Info (10264): Verilog HDL Case Statement information at mux_4_1.v(10): all case item expressions in this case statement are onehot" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 10 0 0 } }  } 0 10264 "Verilog HDL Case Statement information at %1!s!: all case item expressions in this case statement are onehot" 0 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "dataout mux_4_1.v(8) " "Warning (10240): Verilog HDL Always Construct warning at mux_4_1.v(8): inferring latch(es) for variable \"dataout\", which holds its previous value in one or more paths through the always construct" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 8 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "dataout\[15\] mux_4_1.v(4) " "Info (10041): Verilog HDL or VHDL info at mux_4_1.v(4): inferred latch for \"dataout\[15\]\"" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 4 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "dataout\[14\] mux_4_1.v(4) " "Info (10041): Verilog HDL or VHDL info at mux_4_1.v(4): inferred latch for \"dataout\[14\]\"" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 4 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "dataout\[13\] mux_4_1.v(4) " "Info (10041): Verilog HDL or VHDL info at mux_4_1.v(4): inferred latch for \"dataout\[13\]\"" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 4 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "dataout\[12\] mux_4_1.v(4) " "Info (10041): Verilog HDL or VHDL info at mux_4_1.v(4): inferred latch for \"dataout\[12\]\"" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 4 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "dataout\[11\] mux_4_1.v(4) " "Info (10041): Verilog HDL or VHDL info at mux_4_1.v(4): inferred latch for \"dataout\[11\]\"" {  } { { "mux_4_1.v" "" { Text "D:/lts/library/Second/mux_4_1.v" 4 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}