cntr_6ej.tdf

second.rar 这个做的是一秒表计时程序

--lpm_counter CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" lpm_direction="UP" lpm_modulus=39062 lpm_port_updown="PORT_UNUSED" lpm_width=16 clock cout q CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 7.0 cbx_cycloneii 2006:09:29:19:03:26:SJ cbx_lpm_add_sub 2006:10:10:22:03:24:SJ cbx_lpm_compare 2006:04:25:14:54:12:SJ cbx_lpm_counter 2006:11:07:16:43:46:SJ cbx_lpm_decode 2006:04:25:15:10:18:SJ cbx_mgl 2006:10:27:16:08:48:SJ cbx_stratix 2006:09:18:10:47:42:SJ cbx_stratixii 2006:10:13:14:01:30:SJ  VERSION_END


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--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
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--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.


FUNCTION cyclone_lcell (aclr, aload, cin, clk, dataa, datab, datac, datad, ena, inverta, regcascin, sclr, sload)
WITH ( 	cin_used,	lut_mask,	operation_mode,	output_mode,	register_cascade_mode,	sum_lutc_input,	synch_mode) 
RETURNS ( combout, cout, regout);

--synthesis_resources = lut 28 
SUBDESIGN cntr_6ej
( 
	clock	:	input;
	cout	:	output;
	q[15..0]	:	output;
) 
VARIABLE
	cmpr1_aeb_int	:	WIRE;
	cmpr1_aeb	:	WIRE;
	cmpr1_dataa[15..0]	:	WIRE;
	cmpr1_datab[15..0]	:	WIRE;
	counter_cella0 : cyclone_lcell
		WITH (
			cin_used = "false",
			lut_mask = "11AA",
			operation_mode = "arithmetic",
			synch_mode = "on"
		);
	counter_cella1 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella2 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella3 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella4 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella5 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella6 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella7 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella8 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella9 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella10 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella11 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella12 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella13 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella14 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	counter_cella15 : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "12A0",
			operation_mode = "arithmetic",
			sum_lutc_input = "cin",
			synch_mode = "on"
		);
	cout_bit : cyclone_lcell
		WITH (
			cin_used = "true",
			lut_mask = "F8F8",
			operation_mode = "normal",
			sum_lutc_input = "cin",
			synch_mode = "off"
		);
	aclr	: NODE;
	aclr_actual	: WIRE;
	clk_en	: NODE;
	compare_result	: WIRE;
	data[15..0]	: NODE;
	modulus_bus[15..0]	: WIRE;
	modulus_trigger	: WIRE;
	safe_q[15..0]	: WIRE;
	sclr	: NODE;
	sload	: NODE;
	time_to_clear	: WIRE;
	updownDir	: WIRE;

BEGIN 
	IF (cmpr1_dataa[] == cmpr1_datab[]) THEN
		cmpr1_aeb_int = VCC;
	ELSE
		cmpr1_aeb_int = GND;
	END IF;
	cmpr1_aeb = cmpr1_aeb_int;
	cmpr1_dataa[] = safe_q[];
	cmpr1_datab[] = modulus_bus[];
	counter_cella[15..0].aclr = aclr_actual;
	counter_cella[15..0].aload = B"0000000000000000";
	counter_cella[1].cin = counter_cella[0].cout;
	counter_cella[2].cin = counter_cella[1].cout;
	counter_cella[3].cin = counter_cella[2].cout;
	counter_cella[4].cin = counter_cella[3].cout;
	counter_cella[5].cin = counter_cella[4].cout;
	counter_cella[6].cin = counter_cella[5].cout;
	counter_cella[7].cin = counter_cella[6].cout;
	counter_cella[8].cin = counter_cella[7].cout;
	counter_cella[9].cin = counter_cella[8].cout;
	counter_cella[10].cin = counter_cella[9].cout;
	counter_cella[11].cin = counter_cella[10].cout;
	counter_cella[12].cin = counter_cella[11].cout;
	counter_cella[13].cin = counter_cella[12].cout;
	counter_cella[14].cin = counter_cella[13].cout;
	counter_cella[15].cin = counter_cella[14].cout;
	counter_cella[15..0].clk = clock;
	counter_cella[15..0].dataa = safe_q[];
	counter_cella[15..0].datab = B"0000000000000000";
	counter_cella[15..0].datac = ((sload & data[]) # (((! sload) & modulus_bus[]) & (! updownDir)));
	counter_cella[15..0].ena = clk_en;
	counter_cella[15..0].sclr = sclr;
	counter_cella[15..0].sload = (sload # modulus_trigger);
	cout_bit.cin = counter_cella[15].cout;
	cout_bit.dataa = updownDir;
	cout_bit.datab = time_to_clear;
	aclr = GND;
	aclr_actual = aclr;
	clk_en = VCC;
	compare_result = cmpr1_aeb;
	cout = cout_bit.combout;
	data[] = GND;
	modulus_bus[] = B"1001100010010101";
	modulus_trigger = cout_bit.combout;
	q[] = safe_q[];
	safe_q[] = counter_cella[15..0].regout;
	sclr = GND;
	sload = GND;
	time_to_clear = compare_result;
	updownDir = B"1";
END;
--VALID FILE