second_count.tan.rpt

second.rar 这个做的是一秒表计时程序

; Clock Setup: 'clkin'         ; N/A                                      ; None          ; 108.74 MHz ( period = 9.196 ns ) ; count_16:count_16_inst|q[5]     ; mux_4_1:mux_4_1_inst|dataout[1] ; clkin      ; clkin    ; 0            ;
; Clock Hold: 'clkin'          ; Not operational: Clock Skew > Data Delay ; None          ; N/A                              ; RLSifter_4:RLSifter_4_inst|q[2] ; mux_4_1:mux_4_1_inst|dataout[3] ; clkin      ; clkin    ; 42           ;
; Total number of failed paths ;                                          ;               ;                                  ;                                 ;                                 ;            ;          ; 42           ;
+------------------------------+------------------------------------------+---------------+----------------------------------+---------------------------------+---------------------------------+------------+----------+--------------+


+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EP1C6Q240C8        ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Default hold multicycle                               ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clkin           ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clkin'                                                                                                                                                                                                                                                                                                                                                                        ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                   ; To                                                                                     ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 108.74 MHz ( period = 9.196 ns )                    ; count_16:count_16_inst|q[5]                                                            ; mux_4_1:mux_4_1_inst|dataout[1]                                                        ; clkin      ; clkin    ; None                        ; None                      ; 2.522 ns                ;
; N/A                                     ; 109.22 MHz ( period = 9.156 ns )                    ; count_16:count_16_inst|q[7]                                                            ; mux_4_1:mux_4_1_inst|dataout[3]                                                        ; clkin      ; clkin    ; None                        ; None                      ; 2.297 ns                ;
; N/A                                     ; 113.25 MHz ( period = 8.830 ns )                    ; count_16:count_16_inst|q[13]                                                           ; mux_4_1:mux_4_1_inst|dataout[1]                                                        ; clkin      ; clkin    ; None                        ; None                      ; 2.306 ns                ;