prev_cmp_block.qmsg

基于FPGA的多功能电子时钟的设计很经典的哦

{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk_div:inst22\|lpm_counter:count_rtl_2 " "Info: Instantiated megafunction \"clk_div:inst22\|lpm_counter:count_rtl_2\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 9 " "Info: Parameter \"LPM_WIDTH\" = \"9\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION UP " "Info: Parameter \"LPM_DIRECTION\" = \"UP\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_COUNTER " "Info: Parameter \"LPM_TYPE\" = \"LPM_COUNTER\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } {  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3 " "Info: Elaborated megafunction instantiation \"clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3\|alt_counter_f10ke:wysi_counter clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3 " "Info: Elaborated megafunction instantiation \"clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3\|alt_counter_f10ke:wysi_counter\", which is child of megafunction instantiation \"clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3\"" {  } { { "lpm_counter.tdf" "" { Text "f:/quartusii/quartus/libraries/megafunctions/lpm_counter.tdf" 432 4 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3 " "Info: Instantiated megafunction \"clk_div:inst22\|lpm_counter:\\process2:count\[0\]_rtl_3\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 5 " "Info: Parameter \"LPM_WIDTH\" = \"5\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION UP " "Info: Parameter \"LPM_DIRECTION\" = \"UP\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_COUNTER " "Info: Parameter \"LPM_TYPE\" = \"LPM_COUNTER\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } {  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "hourl\[3\] GND " "Warning (13410): Pin \"hourl\[3\]\" stuck at GND" {  } { { "Block.bdf" "" { Schematic "F:/FPGA/newszz/Block.bdf" { { 920 1192 1368 936 "hourl\[3..0\]" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "hourl\[2\] GND " "Warning (13410): Pin \"hourl\[2\]\" stuck at GND" {  } { { "Block.bdf" "" { Schematic "F:/FPGA/newszz/Block.bdf" { { 920 1192 1368 936 "hourl\[3..0\]" "" } } } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "188 " "Info: Implemented 188 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "9 " "Info: Implemented 9 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "38 " "Info: Implemented 38 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "141 " "Info: Implemented 141 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 31 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 31 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "159 " "Info: Allocated 159 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Jun 16 16:46:42 2008 " "Info: Processing ended: Mon Jun 16 16:46:42 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Jun 16 16:46:43 2008 " "Info: Processing started: Mon Jun 16 16:46:43 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off Block -c Block " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off Block -c Block" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "Block EP1K100QC208-3 " "Info: Selected device EP1K100QC208-3 for design \"Block\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Fitter is using the Classic Timing Analyzer" {  } {  } 0 0 "Fitter is using the %1!s! Timing Analyzer" 0 0 "" 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1000 MHz " "Info: Assuming a global fmax requirement of 1000 MHz" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0 "" 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0 "" 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0 "" 0}  } {  } 0 0 "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" 0 0 "" 0}
{ "Info" "IF10KE_F10KE_WIRE_LUT_INSERTED" "1 " "Info: Inserted 1 logic cells in first fitting attempt" {  } {  } 0 0 "Inserted %1!d! logic cells in first fitting attempt" 0 0 "" 0}
{ "Info" "IFIT_FIT_ATTEMPT" "1 Mon Jun 16 2008 16:46:45 " "Info: Started fitting attempt 1 on Mon Jun 16 2008 at 16:46:45" {  } {  } 0 0 "Started fitting attempt %1!d! on %2!s! at %3!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:01 " "Info: Fitter placement operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0 "" 0}