block.tan.summary

基于FPGA的多功能电子时钟的设计很经典的哦

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 3.200 ns
From           : RST1
To             : zhongbai:inst30|cnt[2]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 48.700 ns
From           : counter7:inst6|count[0]
To             : date[3]
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 22.400 ns
From           : CLK
To             : alart_1
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -1.600 ns
From           : RST1
To             : zhongbai:inst30|cnt[2]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 104.17 MHz ( period = 9.600 ns )
From           : counter24:inst5|lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
To             : counter24:inst5|lpm_counter:count_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'CLK5'
Slack          : N/A
Required Time  : None
Actual Time    : 128.21 MHz ( period = 7.800 ns )
From           : c24:inst4|lpm_counter:count_rtl_1|alt_counter_f10ke:wysi_counter|q[3]
To             : c24:inst4|lpm_counter:count_rtl_1|alt_counter_f10ke:wysi_counter|q[2]
From Clock     : CLK5
To Clock       : CLK5
Failed Paths   : 0

Type           : Clock Setup: 'CLK6'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 200.00 MHz ( period = 5.000 ns )
From           : c7:inst46|count[1]
To             : c7:inst46|count[3]
From Clock     : CLK6
To Clock       : CLK6
Failed Paths   : 0

Type           : Clock Setup: 'CLK3'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 200.00 MHz ( period = 5.000 ns )
From           : c10:inst42|count[0]
To             : c10:inst42|count[1]
From Clock     : CLK3
To Clock       : CLK3
Failed Paths   : 0

Type           : Clock Setup: 'CLK1'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 200.00 MHz ( period = 5.000 ns )
From           : c10:inst40|count[0]
To             : c10:inst40|count[1]
From Clock     : CLK1
To Clock       : CLK1
Failed Paths   : 0

Type           : Clock Setup: 'CLK4'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 200.00 MHz ( period = 5.000 ns )
From           : c6:inst43|count[1]
To             : c6:inst43|count[3]
From Clock     : CLK4
To Clock       : CLK4
Failed Paths   : 0

Type           : Clock Setup: 'CLK2'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 200.00 MHz ( period = 5.000 ns )
From           : c6:inst41|count[1]
To             : c6:inst41|count[3]
From Clock     : CLK2
To Clock       : CLK2
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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