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📄 times.rpt

📁 数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84-4验证
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         #  ena & !_LC4_A9 & !_LC5_A9 &  _LC6_A9
         # !ena &  _LC5_A9;

-- Node name is '|cnt10:u1|:9' = '|cnt10:u1|cqi3' 
-- Equation name is '_LC3_A9', type is buried 
_LC3_A9  = DFFE( _EQ045,  _LC1_A20, GLOBAL(!clr),  VCC,  VCC);
  _EQ045 =  ena & !_LC4_A9 &  _LC8_A9
         # !ena &  _LC3_A9;

-- Node name is '|cnt10:u1|LPM_ADD_SUB:73|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_A9', type is buried 
_LC6_A9  = LCELL( _EQ046);
  _EQ046 =  _LC1_A9 &  _LC7_A9;

-- Node name is '|cnt10:u1|LPM_ADD_SUB:73|addcore:adder|:69' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC8_A9', type is buried 
_LC8_A9  = LCELL( _EQ047);
  _EQ047 =  _LC3_A9 & !_LC7_A9
         # !_LC1_A9 &  _LC3_A9
         #  _LC3_A9 & !_LC5_A9
         #  _LC1_A9 & !_LC3_A9 &  _LC5_A9 &  _LC7_A9;

-- Node name is '|cnt10:u1|:48' 
-- Equation name is '_LC4_A9', type is buried 
!_LC4_A9 = _LC4_A9~NOT;
_LC4_A9~NOT = LCELL( _EQ048);
  _EQ048 = !_LC3_A9
         #  _LC5_A9
         #  _LC7_A9
         # !_LC1_A9;

-- Node name is '|cnt10:u1|:173' 
-- Equation name is '_LC2_A9', type is buried 
_LC2_A9  = LCELL( _EQ049);
  _EQ049 = !_LC1_A9 & !_LC3_A9 & !_LC5_A9 & !_LC7_A9;

-- Node name is '|cnt10:u2|:12' = '|cnt10:u2|cqi0' 
-- Equation name is '_LC1_A18', type is buried 
_LC1_A18 = DFFE( _EQ050,  _LC2_A9, GLOBAL(!clr),  VCC,  VCC);
  _EQ050 = !ena &  _LC1_A18
         #  ena & !_LC1_A18;

-- Node name is '|cnt10:u2|:11' = '|cnt10:u2|cqi1' 
-- Equation name is '_LC3_A18', type is buried 
_LC3_A18 = DFFE( _EQ051,  _LC2_A9, GLOBAL(!clr),  VCC,  VCC);
  _EQ051 = !_LC1_A18 & !_LC2_A18 &  _LC3_A18
         #  ena &  _LC1_A18 & !_LC2_A18 & !_LC3_A18
         # !ena &  _LC3_A18;

-- Node name is '|cnt10:u2|:10' = '|cnt10:u2|cqi2' 
-- Equation name is '_LC4_A18', type is buried 
_LC4_A18 = DFFE( _EQ052,  _LC2_A9, GLOBAL(!clr),  VCC,  VCC);
  _EQ052 = !_LC2_A18 &  _LC4_A18 & !_LC5_A18
         #  ena & !_LC2_A18 & !_LC4_A18 &  _LC5_A18
         # !ena &  _LC4_A18;

-- Node name is '|cnt10:u2|:9' = '|cnt10:u2|cqi3' 
-- Equation name is '_LC8_A18', type is buried 
_LC8_A18 = DFFE( _EQ053,  _LC2_A9, GLOBAL(!clr),  VCC,  VCC);
  _EQ053 =  ena & !_LC2_A18 &  _LC7_A18
         # !ena &  _LC8_A18;

-- Node name is '|cnt10:u2|LPM_ADD_SUB:73|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_A18', type is buried 
_LC5_A18 = LCELL( _EQ054);
  _EQ054 =  _LC1_A18 &  _LC3_A18;

-- Node name is '|cnt10:u2|LPM_ADD_SUB:73|addcore:adder|:69' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC7_A18', type is buried 
_LC7_A18 = LCELL( _EQ055);
  _EQ055 = !_LC3_A18 &  _LC8_A18
         # !_LC1_A18 &  _LC8_A18
         # !_LC4_A18 &  _LC8_A18
         #  _LC1_A18 &  _LC3_A18 &  _LC4_A18 & !_LC8_A18;

-- Node name is '|cnt10:u2|:48' 
-- Equation name is '_LC2_A18', type is buried 
!_LC2_A18 = _LC2_A18~NOT;
_LC2_A18~NOT = LCELL( _EQ056);
  _EQ056 = !_LC8_A18
         #  _LC4_A18
         #  _LC3_A18
         # !_LC1_A18;

-- Node name is '|cnt10:u2|:173' 
-- Equation name is '_LC6_A18', type is buried 
_LC6_A18 = LCELL( _EQ057);
  _EQ057 = !_LC1_A18 & !_LC3_A18 & !_LC4_A18 & !_LC8_A18;

-- Node name is '|cnt10:u3|:12' = '|cnt10:u3|cqi0' 
-- Equation name is '_LC2_C2', type is buried 
_LC2_C2  = DFFE( _EQ058,  _LC6_A18, GLOBAL(!clr),  VCC,  VCC);
  _EQ058 = !ena &  _LC2_C2
         #  ena & !_LC2_C2;

-- Node name is '|cnt10:u3|:11' = '|cnt10:u3|cqi1' 
-- Equation name is '_LC6_C2', type is buried 
_LC6_C2  = DFFE( _EQ059,  _LC6_A18, GLOBAL(!clr),  VCC,  VCC);
  _EQ059 = !_LC2_C2 & !_LC4_C2 &  _LC6_C2
         #  ena &  _LC2_C2 & !_LC4_C2 & !_LC6_C2
         # !ena &  _LC6_C2;

-- Node name is '|cnt10:u3|:10' = '|cnt10:u3|cqi2' 
-- Equation name is '_LC1_C2', type is buried 
_LC1_C2  = DFFE( _EQ060,  _LC6_A18, GLOBAL(!clr),  VCC,  VCC);
  _EQ060 =  _LC1_C2 & !_LC4_C2 & !_LC7_C2
         #  ena & !_LC1_C2 & !_LC4_C2 &  _LC7_C2
         # !ena &  _LC1_C2;

-- Node name is '|cnt10:u3|:9' = '|cnt10:u3|cqi3' 
-- Equation name is '_LC5_C2', type is buried 
_LC5_C2  = DFFE( _EQ061,  _LC6_A18, GLOBAL(!clr),  VCC,  VCC);
  _EQ061 =  ena & !_LC4_C2 &  _LC8_C2
         # !ena &  _LC5_C2;

-- Node name is '|cnt10:u3|LPM_ADD_SUB:73|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_C2', type is buried 
_LC7_C2  = LCELL( _EQ062);
  _EQ062 =  _LC2_C2 &  _LC6_C2;

-- Node name is '|cnt10:u3|LPM_ADD_SUB:73|addcore:adder|:69' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC8_C2', type is buried 
_LC8_C2  = LCELL( _EQ063);
  _EQ063 =  _LC5_C2 & !_LC6_C2
         # !_LC2_C2 &  _LC5_C2
         # !_LC1_C2 &  _LC5_C2
         #  _LC1_C2 &  _LC2_C2 & !_LC5_C2 &  _LC6_C2;

-- Node name is '|cnt10:u3|:48' 
-- Equation name is '_LC4_C2', type is buried 
!_LC4_C2 = _LC4_C2~NOT;
_LC4_C2~NOT = LCELL( _EQ064);
  _EQ064 = !_LC5_C2
         #  _LC1_C2
         #  _LC6_C2
         # !_LC2_C2;

-- Node name is '|cnt10:u3|:173' 
-- Equation name is '_LC3_C2', type is buried 
_LC3_C2  = LCELL( _EQ065);
  _EQ065 = !_LC1_C2 & !_LC2_C2 & !_LC5_C2 & !_LC6_C2;

-- Node name is '|cnt10:u5|:12' = '|cnt10:u5|cqi0' 
-- Equation name is '_LC7_C16', type is buried 
_LC7_C16 = DFFE( _EQ066,  _LC3_B16, GLOBAL(!clr),  VCC,  VCC);
  _EQ066 = !ena &  _LC7_C16
         #  ena & !_LC7_C16;

-- Node name is '|cnt10:u5|:11' = '|cnt10:u5|cqi1' 
-- Equation name is '_LC2_C16', type is buried 
_LC2_C16 = DFFE( _EQ067,  _LC3_B16, GLOBAL(!clr),  VCC,  VCC);
  _EQ067 =  _LC2_C16 & !_LC4_C16 & !_LC7_C16
         #  ena & !_LC2_C16 & !_LC4_C16 &  _LC7_C16
         # !ena &  _LC2_C16;

-- Node name is '|cnt10:u5|:10' = '|cnt10:u5|cqi2' 
-- Equation name is '_LC3_C16', type is buried 
_LC3_C16 = DFFE( _EQ068,  _LC3_B16, GLOBAL(!clr),  VCC,  VCC);
  _EQ068 =  _LC3_C16 & !_LC4_C16 & !_LC6_C16
         #  ena & !_LC3_C16 & !_LC4_C16 &  _LC6_C16
         # !ena &  _LC3_C16;

-- Node name is '|cnt10:u5|:9' = '|cnt10:u5|cqi3' 
-- Equation name is '_LC5_C16', type is buried 
_LC5_C16 = DFFE( _EQ069,  _LC3_B16, GLOBAL(!clr),  VCC,  VCC);
  _EQ069 =  ena & !_LC4_C16 &  _LC8_C16
         # !ena &  _LC5_C16;

-- Node name is '|cnt10:u5|LPM_ADD_SUB:73|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_C16', type is buried 
_LC6_C16 = LCELL( _EQ070);
  _EQ070 =  _LC2_C16 &  _LC7_C16;

-- Node name is '|cnt10:u5|LPM_ADD_SUB:73|addcore:adder|:69' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC8_C16', type is buried 
_LC8_C16 = LCELL( _EQ071);
  _EQ071 = !_LC2_C16 &  _LC5_C16
         #  _LC5_C16 & !_LC7_C16
         # !_LC3_C16 &  _LC5_C16
         #  _LC2_C16 &  _LC3_C16 & !_LC5_C16 &  _LC7_C16;

-- Node name is '|cnt10:u5|:48' 
-- Equation name is '_LC4_C16', type is buried 
!_LC4_C16 = _LC4_C16~NOT;
_LC4_C16~NOT = LCELL( _EQ072);
  _EQ072 = !_LC5_C16
         #  _LC3_C16
         #  _LC2_C16
         # !_LC7_C16;

-- Node name is '|cnt10:u5|:173' 
-- Equation name is '_LC1_C16', type is buried 
_LC1_C16 = LCELL( _EQ073);
  _EQ073 = !_LC2_C16 & !_LC3_C16 & !_LC5_C16 & !_LC7_C16;



Project Information                              f:\zhangshuhua\szmb\times.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:01
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:02


Memory Allocated
-----------------

Peak memory allocated during compilation  = 16,573K

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