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📄 ledshow.rpt

📁 交通灯控制器的VHDL设计,能控制十字路口的红绿灯转换,通过目标芯片EPF10KLC84-4验证
💻 RPT
📖 第 1 页 / 共 3 页
字号:
   -      3     -    B    03       DFFE   +            1    3    0    5  count12 (:68)
   -      4     -    B    03       DFFE   +            1    2    0    5  count11 (:69)
   -      7     -    B    11       DFFE   +            3    0    0    6  count10 (:70)
   -      1     -    A    09        OR2        !       0    4    0    8  :129
   -      5     -    A    05        OR2                0    4    0    1  :269
   -      8     -    B    03        OR2        !       0    4    0    8  :492
   -      3     -    B    05        OR2                0    4    0    1  :632
   -      6     -    B    06        OR2                2    1    1    0  :814
   -      7     -    B    05        OR2                2    1    1    0  :820
   -      4     -    B    06        OR2                2    1    1    0  :826
   -      8     -    B    11        OR2                2    1    1    0  :832
   -      3     -    B    06        OR2                2    1    1    0  :838
   -      1     -    B    06        OR2                2    1    1    0  :844
   -      8     -    B    06        OR2                2    1    1    0  :850
   -      2     -    B    11        OR2                2    1    1    0  :856
   -      2     -    B    06        OR2                2    1    1    0  :873
   -      3     -    A    05        OR2                2    1    1    0  :879
   -      5     -    B    06        OR2                2    1    1    0  :885
   -      2     -    A    02        OR2                2    1    1    0  :891
   -      7     -    B    06        OR2                2    1    1    0  :897
   -      5     -    A    02        OR2                2    1    1    0  :903
   -      5     -    A    09        OR2                2    1    1    0  :909
   -      1     -    A    02        OR2                2    1    1    0  :915
   -      5     -    B    11        OR2        !       2    0    0    1  :1037
   -      4     -    A    02        OR2        !       2    0    0    1  :1126


Code:

s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register


Device-Specific Information:                          f:\eda\jtdkz\ledshow.rpt
ledshow

** FASTTRACK INTERCONNECT UTILIZATION **

Row FastTrack Interconnect:

          Global         Left Half-      Right Half-
         FastTrack       FastTrack       FastTrack 
Row     Interconnect    Interconnect    Interconnect    Input Pins     Output Pins     Bidir Pins
A:       3/ 96(  3%)    10/ 48( 20%)     0/ 48(  0%)    0/16(  0%)      6/16( 37%)     0/16(  0%)
B:       7/ 96(  7%)    16/ 48( 33%)     0/ 48(  0%)    0/16(  0%)      9/16( 56%)     0/16(  0%)
C:       1/ 96(  1%)     1/ 48(  2%)     1/ 48(  2%)    0/16(  0%)      3/16( 18%)     0/16(  0%)


Column FastTrack Interconnect:

         FastTrack                                 
Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      1/24(  4%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
02:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
03:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
04:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
05:      3/24( 12%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
06:      2/24(  8%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
07:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
08:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
11:      1/24(  4%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
12:      2/24(  8%)     0/4(  0%)      1/4( 25%)       0/4(  0%)
13:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
14:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
15:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
16:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
17:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
18:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
19:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
20:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
21:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
22:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
23:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
24:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                          f:\eda\jtdkz\ledshow.rpt
ledshow

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT       22         sub


Device-Specific Information:                          f:\eda\jtdkz\ledshow.rpt
ledshow

** EQUATIONS **

clk      : INPUT;
set1     : INPUT;
set2     : INPUT;
state0   : INPUT;
state1   : INPUT;
sub      : INPUT;
urgen    : INPUT;

-- Node name is ':70' = 'count10' 
-- Equation name is 'count10', location is LC7_B11, type is buried.
count10  = DFFE( _EQ001, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ001 =  set1 &  state1
         #  set1 &  state0
         # !count10 & !set1;

-- Node name is ':69' = 'count11' 
-- Equation name is 'count11', location is LC4_B3, type is buried.
count11  = DFFE( _EQ002, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ002 =  count10 &  count11 & !_LC8_B3 & !set1
         # !count10 & !count11 & !_LC8_B3 & !set1;

-- Node name is ':68' = 'count12' 
-- Equation name is 'count12', location is LC3_B3, type is buried.
count12  = DFFE( _EQ003, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ003 = !_LC5_B3 & !_LC8_B3 & !set1
         # !_LC5_B11 &  set1;

-- Node name is ':67' = 'count13' 
-- Equation name is 'count13', location is LC2_B3, type is buried.
count13  = DFFE( _EQ004, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ004 =  count13 &  _LC6_B3 & !set1
         # !count13 & !_LC6_B3 & !set1
         #  _LC8_B3 & !set1;

-- Node name is ':66' = 'count14' 
-- Equation name is 'count14', location is LC3_B11, type is buried.
count14  = DFFE( _EQ005, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ005 = !count14 &  _LC8_B3 & !set1
         #  count14 & !_LC8_B3 & !set1;

-- Node name is ':65' = 'count15' 
-- Equation name is 'count15', location is LC5_B5, type is buried.
count15  = DFFE( _EQ006, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ006 =  count14 &  count15 & !set1
         # !count14 & !count15 &  _LC8_B3 & !set1
         #  count15 & !_LC8_B3 & !set1;

-- Node name is ':64' = 'count16' 
-- Equation name is 'count16', location is LC4_B5, type is buried.
count16  = DFFE( _EQ007, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ007 =  _LC3_B5 & !set1
         #  set1 &  state1
         #  set1 & !state0;

-- Node name is ':63' = 'count17' 
-- Equation name is 'count17', location is LC1_B5, type is buried.
count17  = DFFE( _EQ008, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ008 = !_LC6_B5 &  _LC8_B3 & !set1
         # !_LC8_B3 & !_LC8_B5 & !set1;

-- Node name is ':51' = 'count20' 
-- Equation name is 'count20', location is LC8_A2, type is buried.
count20  = DFFE( _EQ009, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ009 =  set2 & !state1
         #  set2 &  state0
         # !count20 & !set2;

-- Node name is ':50' = 'count21' 
-- Equation name is 'count21', location is LC2_A9, type is buried.
count21  = DFFE( _EQ010, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ010 =  count20 &  count21 & !_LC1_A9 & !set2
         # !count20 & !count21 & !_LC1_A9 & !set2;

-- Node name is ':49' = 'count22' 
-- Equation name is 'count22', location is LC7_A2, type is buried.
count22  = DFFE( _EQ011, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ011 = !_LC1_A9 & !_LC3_A9 & !set2
         # !_LC4_A2 &  set2;

-- Node name is ':48' = 'count23' 
-- Equation name is 'count23', location is LC7_A9, type is buried.
count23  = DFFE( _EQ012, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ012 =  count23 &  _LC6_A9 & !set2
         # !count23 & !_LC6_A9 & !set2
         #  _LC1_A9 & !set2;

-- Node name is ':47' = 'count24' 
-- Equation name is 'count24', location is LC3_A2, type is buried.
count24  = DFFE( _EQ013, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ013 = !count24 &  _LC1_A9 & !set2
         #  count24 & !_LC1_A9 & !set2;

-- Node name is ':46' = 'count25' 
-- Equation name is 'count25', location is LC1_A5, type is buried.
count25  = DFFE( _EQ014, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ014 =  count24 &  count25 & !set2
         # !count24 & !count25 &  _LC1_A9 & !set2
         #  count25 & !_LC1_A9 & !set2;

-- Node name is ':45' = 'count26' 
-- Equation name is 'count26', location is LC6_A5, type is buried.
count26  = DFFE( _EQ015, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ015 =  _LC5_A5 & !set2
         #  set2 & !state1
         #  set2 & !state0;

-- Node name is ':44' = 'count27' 
-- Equation name is 'count27', location is LC2_A5, type is buried.
count27  = DFFE( _EQ016, GLOBAL( sub),  VCC,  VCC,  VCC);
  _EQ016 =  _LC1_A9 & !_LC7_A5 & !set2
         # !_LC1_A9 & !_LC8_A5 & !set2;

-- Node name is 'g1' 
-- Equation name is 'g1', type is output 
g1       =  _LC4_B11;

-- Node name is 'g2' 
-- Equation name is 'g2', type is output 
g2       =  _LC6_B11;

-- Node name is 'led10' 
-- Equation name is 'led10', type is output 
led10    =  _LC2_B11;

-- Node name is 'led11' 
-- Equation name is 'led11', type is output 
led11    =  _LC8_B6;

-- Node name is 'led12' 
-- Equation name is 'led12', type is output 
led12    =  _LC1_B6;

-- Node name is 'led13' 
-- Equation name is 'led13', type is output 
led13    =  _LC3_B6;

-- Node name is 'led14' 
-- Equation name is 'led14', type is output 
led14    =  _LC8_B11;

-- Node name is 'led15' 
-- Equation name is 'led15', type is output 
led15    =  _LC4_B6;

-- Node name is 'led16' 
-- Equation name is 'led16', type is output 
led16    =  _LC7_B5;

-- Node name is 'led17' 
-- Equation name is 'led17', type is output 
led17    =  _LC6_B6;

-- Node name is 'led20' 
-- Equation name is 'led20', type is output 
led20    =  _LC1_A2;

-- Node name is 'led21' 
-- Equation name is 'led21', type is output 
led21    =  _LC5_A9;

-- Node name is 'led22' 
-- Equation name is 'led22', type is output 
led22    =  _LC5_A2;

-- Node name is 'led23' 
-- Equation name is 'led23', type is output 
led23    =  _LC7_B6;

-- Node name is 'led24' 
-- Equation name is 'led24', type is output 
led24    =  _LC2_A2;

-- Node name is 'led25' 
-- Equation name is 'led25', type is output 
led25    =  _LC5_B6;

-- Node name is 'led26' 
-- Equation name is 'led26', type is output 
led26    =  _LC3_A5;

-- Node name is 'led27' 
-- Equation name is 'led27', type is output 
led27    =  _LC2_B6;

-- Node name is 'r1' 
-- Equation name is 'r1', type is output 
r1       =  _LC7_C17;

-- Node name is 'r2' 
-- Equation name is 'r2', type is output 
r2       =  _LC1_C17;

-- Node name is 'y1' 
-- Equation name is 'y1', type is output 
y1       =  _LC1_B11;

-- Node name is 'y2' 
-- Equation name is 'y2', type is output 
y2       =  _LC6_A2;

-- Node name is '|LPM_ADD_SUB:190|addcore:adder|pcarry5~1' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC8_A9', type is buried 
-- synthesized logic cell 
_LC8_A9  = LCELL( _EQ017);
  _EQ017 =  count24
         #  count23
         #  count25;

-- Node name is '|LPM_ADD_SUB:190|addcore:adder|pcarry5' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_A9', type is buried 
_LC4_A9  = LCELL( _EQ018);
  _EQ018 =  count20 &  count21 &  count22
         #  _LC8_A9;

-- Node name is '|LPM_ADD_SUB:190|addcore:adder|:155' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC7_A5', type is buried 
_LC7_A5  = LCELL( _EQ019);
  _EQ019 = !count26 &  count27 & !_LC4_A9
         #  count26 & !count27
         # !count27 &  _LC4_A9;

-- Node name is '|LPM_ADD_SUB:231|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC6_A9', type is buried 
_LC6_A9  = LCELL( _EQ020);
  _EQ020 =  count21
         #  count20
         #  count22;

-- Node name is '|LPM_ADD_SUB:231|addcore:adder|pcarry5' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_A5', type is buried 
_LC4_A5  = LCELL( _EQ021);
  _EQ021 =  count24
         # !_LC1_A9
         #  count25;

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