📄 seg7.fit.rpt
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; LVCMOS ; 10 pF ; Not Available ;
; 2.5 V ; 10 pF ; Not Available ;
; 1.8 V ; 10 pF ; Not Available ;
; 1.5 V ; 10 pF ; Not Available ;
; 3.3V Schmitt Trigger Input ; 10 pF ; Not Available ;
; 2.5V Schmitt Trigger Input ; 10 pF ; Not Available ;
; 3.3-V PCI ; 10 pF ; 25 Ohm (Parallel) ;
+----------------------------+-------+------------------------+
Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity ;
+-------------------------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; UFM Blocks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ;
+-------------------------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------+
; |seg7 ; 64 (0) ; 45 ; 0 ; 13 ; 0 ; 19 (0) ; 0 (0) ; 45 (0) ; 25 (0) ; 0 (0) ; |seg7 ;
; |bin27seg:inst6| ; 7 (7) ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 0 (0) ; 0 (0) ; 0 (0) ; 0 (0) ; |seg7|bin27seg:inst6 ;
; |cont:inst1| ; 5 (5) ; 5 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (5) ; 0 (0) ; 0 (0) ; |seg7|cont:inst1 ;
; |cont:inst3| ; 4 (4) ; 4 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (4) ; 0 (0) ; 0 (0) ; |seg7|cont:inst3 ;
; |lpm_counter0:inst12| ; 25 (0) ; 25 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (0) ; 25 (0) ; 0 (0) ; |seg7|lpm_counter0:inst12 ;
; |lpm_counter:lpm_counter_component| ; 25 (0) ; 25 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (0) ; 25 (0) ; 0 (0) ; |seg7|lpm_counter0:inst12|lpm_counter:lpm_counter_component ;
; |cntr_had:auto_generated| ; 25 (25) ; 25 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 25 (25) ; 25 (25) ; 0 (0) ; |seg7|lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated ;
; |segmain:inst2| ; 14 (14) ; 2 ; 0 ; 0 ; 0 ; 12 (12) ; 0 (0) ; 2 (2) ; 0 (0) ; 0 (0) ; |seg7|segmain:inst2 ;
; |subcountor:inst4| ; 4 (4) ; 4 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (4) ; 0 (0) ; 0 (0) ; |seg7|subcountor:inst4 ;
; |subcountor:inst| ; 5 (5) ; 5 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 5 (5) ; 0 (0) ; 0 (0) ; |seg7|subcountor:inst ;
+-------------------------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+-------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+--------------------------------------+
; Delay Chain Summary ;
+-----------+----------+---------------+
; Name ; Pin Type ; Pad to Core 0 ;
+-----------+----------+---------------+
; reset ; Input ; 1 ;
; clk ; Input ; 0 ;
; ledcom[3] ; Output ; -- ;
; ledcom[2] ; Output ; -- ;
; ledcom[1] ; Output ; -- ;
; ledcom[0] ; Output ; -- ;
; seg7[6] ; Output ; -- ;
; seg7[5] ; Output ; -- ;
; seg7[4] ; Output ; -- ;
; seg7[3] ; Output ; -- ;
; seg7[2] ; Output ; -- ;
; seg7[1] ; Output ; -- ;
; seg7[0] ; Output ; -- ;
+-----------+----------+---------------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Control Signals ;
+------------------------------------------------------------------------------------------+---------------+---------+----------------------------+--------+----------------------+------------------+
; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ;
+------------------------------------------------------------------------------------------+---------------+---------+----------------------------+--------+----------------------+------------------+
; clk ; PIN_18 ; 25 ; Clock ; yes ; Global clock ; GCLK0 ;
; cont:inst1|full ; LC_X10_Y6_N4 ; 4 ; Clock ; yes ; Global clock ; GCLK2 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[23] ; LC_X10_Y7_N6 ; 6 ; Clock ; yes ; Global clock ; GCLK1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[24] ; LC_X10_Y7_N7 ; 6 ; Clock ; yes ; Global clock ; GCLK3 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[5] ; LC_X8_Y7_N8 ; 3 ; Clock ; no ; -- ; -- ;
; reset ; PIN_93 ; 20 ; Async. clear, Clock enable ; no ; -- ; -- ;
; subcountor:inst|full ; LC_X12_Y10_N5 ; 4 ; Clock ; no ; -- ; -- ;
+------------------------------------------------------------------------------------------+---------------+---------+----------------------------+--------+----------------------+------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Global & Other Fast Signals ;
+------------------------------------------------------------------------------------------+--------------+---------+----------------------+------------------+
; Name ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+------------------------------------------------------------------------------------------+--------------+---------+----------------------+------------------+
; clk ; PIN_18 ; 25 ; Global clock ; GCLK0 ;
; cont:inst1|full ; LC_X10_Y6_N4 ; 4 ; Global clock ; GCLK2 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[23] ; LC_X10_Y7_N6 ; 6 ; Global clock ; GCLK1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[24] ; LC_X10_Y7_N7 ; 6 ; Global clock ; GCLK3 ;
+------------------------------------------------------------------------------------------+--------------+---------+----------------------+------------------+
+---------------------------------------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals ;
+-----------------------------------------------------------------------------------------------------------+---------+
; Name ; Fan-Out ;
+-----------------------------------------------------------------------------------------------------------+---------+
; reset ; 20 ;
; segmain:inst2|comclk[0] ; 12 ;
; segmain:inst2|comclk[1] ; 11 ;
; segmain:inst2|dataout[3]~58 ; 7 ;
; segmain:inst2|dataout[2]~56 ; 7 ;
; segmain:inst2|dataout[1]~54 ; 7 ;
; segmain:inst2|dataout[0]~52 ; 7 ;
; cont:inst1|time[0] ; 6 ;
; subcountor:inst|time[0] ; 6 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella6~COUT ; 5 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella11~COUT ; 5 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella16~COUT ; 5 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella1~COUT ; 5 ;
; subcountor:inst|time[2] ; 5 ;
; cont:inst1|time[1] ; 5 ;
; subcountor:inst|time[1] ; 5 ;
; subcountor:inst4|time[0] ; 5 ;
; cont:inst3|time[0] ; 5 ;
; subcountor:inst|full ; 4 ;
; subcountor:inst|time[3] ; 4 ;
; subcountor:inst4|time[2] ; 4 ;
; cont:inst1|time[2] ; 4 ;
; subcountor:inst4|time[1] ; 4 ;
; cont:inst3|time[1] ; 4 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella21~COUT ; 3 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[5] ; 3 ;
; subcountor:inst4|time[3] ; 3 ;
; cont:inst1|time[3] ; 3 ;
; cont:inst3|time[2] ; 3 ;
; cont:inst3|time[3] ; 2 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[6] ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella7~COUTCOUT1_3 ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella7~COUT ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[7] ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella8~COUTCOUT1_3 ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella8~COUT ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[8] ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella9~COUTCOUT1_3 ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella9~COUT ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[9] ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella10~COUTCOUT1_3 ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|counter_cella10~COUT ; 1 ;
; lpm_counter0:inst12|lpm_counter:lpm_counter_component|cntr_had:auto_generated|safe_q[10] ; 1 ;
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