segmain.vhd

vhdl的很多例子

library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity segmain is
 PORT( clk  :  IN  STD_LOGIC;
       rst  :  IN  STD_LOGIC;
    datain  :  IN STD_LOGIC_VECTOR(15 DOWNTO 0);
    data_out:  OUT STD_LOGIC_VECTOR(6 downto 0);
    ledcom  :  OUT STD_LOGIC_VECTOR(3 downto 0)
 );
END segmain;
ARCHITECTURE behav OF segmain IS
  
  SIGNAL bcd_led  :  STD_LOGIC_VECTOR(3 DOWNTO 0);
  SIGNAL clkcnt   :  STD_LOGIC_VECTOR(16 DOWNTO 0);
begin

process(clk,rst)
begin
  if(rst='0')then
    clkcnt<="00000000000000000";
    elsif(rising_edge(clk))then
     clkcnt<= clkcnt+1;
  end if;
end process;



process(clkcnt(16 downto 15),datain)
 begin
   case clkcnt(16 downto 15) is
      when "00" =>bcd_led<=datain(3  downto 0);ledcom<="1110" ;
      when "01" =>bcd_led<=datain(7  downto 4);ledcom<="1101" ;
      when "10" =>bcd_led<=datain(11 downto 8);ledcom<="1011" ;
      when "11" =>bcd_led<=datain(15 downto 12);ledcom<="0111" ;
      when others => NULL;
   end case;
end process;

process(bcd_led)
	begin
			case bcd_led is
				when "0000" => data_out <= "1000000"; -- 0
				when "0001" => data_out <= "1111001"; -- 1
				when "0010" => data_out <= "0100100"; -- 2
				when "0011" => data_out <= "0110000"; -- 3
				when "0100" => data_out <= "0011001"; -- 4
				when "0101" => data_out <= "0010010"; -- 5
				when "0110" => data_out <= "0000010"; -- 6
				when "0111" => data_out <= "1111000"; -- 7
				when "1000" => data_out <= "0000000"; -- 8
				when "1001" => data_out <= "0010000"; -- 9
				when "1010" => data_out <= "0001000"; -- A
				when "1011" => data_out <= "0000011"; -- b
				when "1100" => data_out <= "0100111"; -- c
				when "1101" => data_out <= "0100001"; -- d
				when "1110" => data_out <= "0000110"; -- E
				when "1111" => data_out <= "0001110"; -- F
				when others => NULL;
			end case;
	end process;
	
--dataout<=bcd_led;

end behav;

------------------------------------------------------------------------------------
-- DESCRIPTION   :   BIN to seven segments converter
--                   segment encoding
--                        a
--                      +---+ 
--                    f |   | b
--                      +---+  <- g
--                    e |   | c
--                      +---+
--                        d
--                  Outputs (data_out) active         : low
------------------------------------------------------------------------------------