i2c_t.vhd

来自「vhdl的很多例子」· VHDL 代码 · 共 41 行

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY i2c_t IS
   PORT ( 
        rst             : IN std_logic;  
        wr_input        : IN std_logic;  
        rd_input        : IN std_logic; 
        data_out        : OUT std_logic_vector(3 DOWNTO 0);--输入写入EEPROM的数据
        wr_output       : OUT std_logic;--要求写的输入       
        rd_output       : OUT std_logic--要求读的输入
        );
END i2c_t;

ARCHITECTURE test OF i2c_t IS

SIGNAL  counter   :    std_logic_vector(3 DOWNTO 0);

begin

wr_output<=wr_input;
rd_output<=rd_input;

PROCESS(wr_input,rst)
  begin
   if(rst='0') then
   counter<="0000";
    elsif (wr_input'event and wr_input='0') then
      --if (counter="1111") then
    --    counter<="0000";  
    --   else 
        counter<=counter+"0001";
  -- end if;
 end if;
end process;
data_out<=counter;

END test;