📄 i2c.fit.eqn
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--B1L227 is i2c_test:inst|Mux~22885 at LC_X10_Y7_N3
--operation mode is normal
B1L227 = B1_i2c_state[0] & (B1_i2c_state[1] # B1L223) # !B1_i2c_state[0] & !B1_i2c_state[1] & B1L226;
--B1L228 is i2c_test:inst|Mux~22886 at LC_X10_Y7_N7
--operation mode is normal
B1L228 = B1_i2c_state[1] & (B1L227 & B1_inner_state[0] # !B1L227 & (B1L222)) # !B1_i2c_state[1] & (B1L227);
--B1L229 is i2c_test:inst|Mux~22887 at LC_X10_Y7_N8
--operation mode is normal
B1L229 = B1_i2c_state[2] & B1_inner_state[0] # !B1_i2c_state[2] & (!B1_main_state[1] & B1L228);
--B1L230 is i2c_test:inst|Mux~22888 at LC_X9_Y7_N3
--operation mode is normal
B1L230 = B1_phase3 & (B1_inner_state[0] & B1_inner_state[3] & !B1L197 # !B1_inner_state[0] & (B1_inner_state[3] $ !B1L197)) # !B1_phase3 & B1_inner_state[0];
--B1L231 is i2c_test:inst|Mux~22889 at LC_X9_Y7_N4
--operation mode is normal
B1L231 = B1_i2c_state[0] & B1L230 # !B1_i2c_state[0] & (B1L226);
--B1L232 is i2c_test:inst|Mux~22890 at LC_X10_Y9_N4
--operation mode is normal
B1L232 = !B1_main_state[0] & (B1_i2c_state[0] # !B1_i2c_state[1]);
--B1L233 is i2c_test:inst|Mux~22891 at LC_X10_Y9_N9
--operation mode is normal
B1L233 = B1L198 & B1_inner_state[0] # !B1L198 & (B1L232 & (B1L231) # !B1L232 & B1_inner_state[0]);
--B1L159 is i2c_test:inst|Equal~537 at LC_X6_Y6_N8
--operation mode is normal
B1L159 = !B1_clk_div[0] & B1_clk_div[3];
--B1L160 is i2c_test:inst|Equal~538 at LC_X6_Y6_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_clk_div[1]_qfbk = B1_clk_div[1];
B1L160 = B1L157 & !B1_clk_div[5] & B1_clk_div[1]_qfbk & B1L159;
--B1_clk_div[1] is i2c_test:inst|clk_div[1] at LC_X6_Y6_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_clk_div[1] = DFFEAS(B1L160, GLOBAL(clk), GLOBAL(reset), , , B1L6, , , VCC);
--B1L234 is i2c_test:inst|Mux~22893 at LC_X9_Y6_N6
--operation mode is normal
B1L234 = B1_phase3 & B1_inner_state[1] & B1_inner_state[2] & B1_inner_state[0];
--B1L235 is i2c_test:inst|Mux~22894 at LC_X8_Y6_N9
--operation mode is normal
B1L235 = !B1_inner_state[2] & !B1_inner_state[1] & B1_phase3 & B1_inner_state[0];
--B1L236 is i2c_test:inst|Mux~22895 at LC_X9_Y6_N3
--operation mode is normal
B1L236 = B1L234 & (B1_i2c_state[1]) # !B1L234 & (B1L235 & !B1_i2c_state[1]);
--B1L237 is i2c_test:inst|Mux~22896 at LC_X11_Y7_N0
--operation mode is normal
B1L237 = !B1_main_state[1] & (!B1_i2c_state[2]);
--B1L238 is i2c_test:inst|Mux~22897 at LC_X8_Y8_N7
--operation mode is normal
B1L238 = !B1_sda_buf & (!B1L210);
--B1L239 is i2c_test:inst|Mux~22898 at LC_X10_Y10_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_writeData_reg[3]_qfbk = B1_writeData_reg[3];
B1L239 = B1_inner_state[1] & (B1_inner_state[0]) # !B1_inner_state[1] & (B1_inner_state[0] & !B1_writeData_reg[2] # !B1_inner_state[0] & (B1_writeData_reg[3]_qfbk));
--B1_writeData_reg[3] is i2c_test:inst|writeData_reg[3] at LC_X10_Y10_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_writeData_reg[3] = DFFEAS(B1L239, GLOBAL(clk), GLOBAL(reset), , B1L201, D1_counter[3], , , VCC);
--B1L240 is i2c_test:inst|Mux~22899 at LC_X10_Y10_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_writeData_reg[1]_qfbk = B1_writeData_reg[1];
B1L240 = B1_inner_state[1] & (B1L239 & !B1_writeData_reg[0] # !B1L239 & (B1_writeData_reg[1]_qfbk)) # !B1_inner_state[1] & (B1L239);
--B1_writeData_reg[1] is i2c_test:inst|writeData_reg[1] at LC_X10_Y10_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.
B1_writeData_reg[1] = DFFEAS(B1L240, GLOBAL(clk), GLOBAL(reset), , B1L201, D1_counter[1], , , VCC);
--B1L241 is i2c_test:inst|Mux~22900 at LC_X9_Y8_N9
--operation mode is normal
B1L241 = B1_phase3 & (B1L240) # !B1_phase3 & !B1_sda_buf;
--B1L242 is i2c_test:inst|Mux~22901 at LC_X9_Y7_N9
--operation mode is normal
B1L242 = B1_inner_state[0] & (B1_inner_state[1] & !B1_sda_buf) # !B1_inner_state[0] & (B1_phase1 & B1_inner_state[1] # !B1_sda_buf);
--B1L333 is i2c_test:inst|sda_buf~89 at LC_X8_Y9_N2
--operation mode is normal
B1L333 = B1_phase0 & (A1L6) # !B1_phase0 & (!B1_sda_buf);
--B1L243 is i2c_test:inst|Mux~22902 at LC_X8_Y9_N3
--operation mode is normal
B1L243 = B1_inner_state[0] & !B1_inner_state[1] & B1L333;
--B1L244 is i2c_test:inst|Mux~22903 at LC_X8_Y8_N2
--operation mode is normal
B1L244 = B1L242 # B1L243 & (B1_phase1 # !B1_phase3);
--B1L245 is i2c_test:inst|Mux~22904 at LC_X8_Y8_N8
--operation mode is normal
B1L245 = !B1_sda_buf & (!B1_inner_state[0] & !B1_inner_state[1] # !B1_phase3);
--B1L246 is i2c_test:inst|Mux~22905 at LC_X8_Y8_N3
--operation mode is normal
B1L246 = B1_inner_state[3] & (B1_inner_state[2] # B1L244) # !B1_inner_state[3] & B1L245 & !B1_inner_state[2];
--B1L247 is i2c_test:inst|Mux~22906 at LC_X9_Y8_N6
--operation mode is normal
B1L247 = B1_inner_state[2] & (B1L246 & (!B1_sda_buf) # !B1L246 & B1L241) # !B1_inner_state[2] & (B1L246);
--B1L248 is i2c_test:inst|Mux~22907 at LC_X9_Y8_N7
--operation mode is normal
B1L248 = B1_i2c_state[1] & !B1_i2c_state[0] & (B1L247);
--B1L249 is i2c_test:inst|Mux~22908 at LC_X8_Y9_N8
--operation mode is normal
B1L249 = !B1_inner_state[2] & (!B1_phase3);
--B1L250 is i2c_test:inst|Mux~22909 at LC_X8_Y9_N4
--operation mode is normal
B1L250 = B1L249 & (B1L243 # !B1_sda_buf & !B1L200) # !B1L249 & !B1_sda_buf & !B1L200;
--B1L251 is i2c_test:inst|Mux~22910 at LC_X9_Y8_N5
--operation mode is normal
B1L251 = !B1_inner_state[1] & !B1_inner_state[0] & !B1_inner_state[2] # !B1_phase3;
--B1L252 is i2c_test:inst|Mux~22911 at LC_X9_Y8_N2
--operation mode is normal
B1L252 = B1L199 & (B1_inner_state[2] # !B1_sda_buf & B1L251) # !B1L199 & !B1_sda_buf & B1L251;
--B1L253 is i2c_test:inst|Mux~22912 at LC_X9_Y9_N8
--operation mode is normal
B1L253 = B1_inner_state[0] # B1_inner_state[2];
--B1L254 is i2c_test:inst|Mux~22913 at LC_X9_Y9_N1
--operation mode is normal
B1L254 = B1_inner_state[1] # B1_phase3 & B1_link;
--B1L255 is i2c_test:inst|Mux~22914 at LC_X9_Y9_N2
--operation mode is normal
B1L255 = B1_sda_buf & (B1L254) # !B1_sda_buf & (B1_phase1 & !B1L254);
--B1L256 is i2c_test:inst|Mux~22915 at LC_X9_Y9_N3
--operation mode is normal
B1L256 = B1L253 & !B1_sda_buf & !B1_phase3 # !B1L253 & (B1_sda_buf & B1_phase3 & B1L255 # !B1_sda_buf & (!B1L255));
--B1L257 is i2c_test:inst|Mux~22916 at LC_X9_Y8_N3
--operation mode is normal
B1L257 = B1_i2c_state[0] & (B1L252) # !B1_i2c_state[0] & B1L256;
--B1L258 is i2c_test:inst|Mux~22917 at LC_X9_Y8_N4
--operation mode is normal
B1L258 = !B1_i2c_state[1] & (B1_inner_state[3] & B1L250 # !B1_inner_state[3] & (B1L257));
--B1L259 is i2c_test:inst|Mux~22918 at LC_X9_Y8_N8
--operation mode is normal
B1L259 = B1L238 # B1L237 & (B1L258 # B1L248);
--B1L260 is i2c_test:inst|Mux~22919 at LC_X9_Y8_N1
--operation mode is normal
B1L260 = B1_phase3 & (B1_inner_state[0] & B1_inner_state[1]) # !B1_phase3 & !B1_sda_buf;
--B1L261 is i2c_test:inst|Mux~22920 at LC_X10_Y9_N2
--operation mode is normal
B1L261 = B1_inner_state[0] & !B1_inner_state[1];
--B1L262 is i2c_test:inst|Mux~22921 at LC_X10_Y9_N8
--operation mode is normal
B1L262 = B1_phase0 & (B1L261 & (A1L6) # !B1L261 & !B1_sda_buf) # !B1_phase0 & !B1_sda_buf;
--B1L263 is i2c_test:inst|Mux~22922 at LC_X9_Y10_N0
--operation mode is normal
B1L263 = B1_inner_state[1] # !B1_phase1;
--B1L264 is i2c_test:inst|Mux~22923 at LC_X9_Y10_N1
--operation mode is normal
B1L264 = !B1_sda_buf & (B1_inner_state[0] & !B1_phase3 # !B1_inner_state[0] & (B1L263));
--B1L265 is i2c_test:inst|Mux~22924 at LC_X9_Y10_N2
--operation mode is normal
B1L265 = B1L264 # B1L199 & (B1_link # B1_inner_state[1]);
--B1L266 is i2c_test:inst|Mux~22925 at LC_X10_Y8_N9
--operation mode is normal
B1L266 = B1_inner_state[2] & B1_inner_state[3] # !B1_inner_state[2] & (B1_inner_state[3] & (B1L262) # !B1_inner_state[3] & B1L265);
--B1L267 is i2c_test:inst|Mux~22926 at LC_X10_Y8_N3
--operation mode is normal
B1L267 = B1_inner_state[2] & (B1L266 & (!B1_sda_buf) # !B1L266 & B1L260) # !B1_inner_state[2] & (B1L266);
--B1L268 is i2c_test:inst|Mux~22927 at LC_X10_Y8_N7
--operation mode is normal
B1L268 = B1_i2c_state[0] & !B1_sda_buf # !B1_i2c_state[0] & (B1L267);
--B1L269 is i2c_test:inst|Mux~22928 at LC_X10_Y8_N2
--operation mode is normal
B1L269 = B1_inner_state[1] & (B1_phase1) # !B1_inner_state[1] & B1_phase0 & (A1L6);
--B1L270 is i2c_test:inst|Mux~22929 at LC_X9_Y6_N7
--operation mode is normal
B1L270 = B1_inner_state[1] # B1_inner_state[0] & (!B1_phase3) # !B1_inner_state[0] & !B1_phase0;
--B1L271 is i2c_test:inst|Mux~22930 at LC_X10_Y8_N8
--operation mode is normal
B1L271 = B1_sda_buf & (!B1_inner_state[0] & B1L269) # !B1_sda_buf & (B1L270 # !B1_inner_state[0] & B1L269);
--B1L272 is i2c_test:inst|Mux~22931 at LC_X10_Y9_N5
--operation mode is normal
B1L272 = B1_phase0 & (B1L327 & !B1_sda_buf # !B1L327 & (A1L6)) # !B1_phase0 & !B1_sda_buf;
--B1L273 is i2c_test:inst|Mux~22932 at LC_X10_Y8_N0
--operation mode is normal
B1L273 = B1_inner_state[2] & B1_inner_state[3] # !B1_inner_state[2] & (B1_inner_state[3] & (B1L271) # !B1_inner_state[3] & B1L272);
--B1L274 is i2c_test:inst|Mux~22933 at LC_X10_Y8_N1
--operation mode is normal
B1L274 = B1_inner_state[2] & (B1L273 & !B1_sda_buf # !B1L273 & (B1L333)) # !B1_inner_state[2] & (B1L273);
--B1L275 is i2c_test:inst|Mux~22934 at LC_X10_Y8_N4
--operation mode is normal
B1L275 = B1_i2c_state[0] & (B1L274) # !B1_i2c_state[0] & !B1_sda_buf;
--B1L276 is i2c_test:inst|Mux~22935 at LC_X9_Y9_N4
--operation mode is normal
B1L276 = B1_i2c_state[0] & (B1_inner_state[3]) # !B1_i2c_state[0] & (B1_inner_state[3] & (B1L250) # !B1_inner_state[3] & B1L256);
--B1L277 is i2c_test:inst|Mux~22936 at LC_X8_Y9_N9
--operation mode is normal
B1L277 = B1L200 & (B1_phase3 # B1L333) # !B1L200 & (!B1_sda_buf);
--B1L278 is i2c_test:inst|Mux~22937 at LC_X9_Y9_N5
--operation mode is normal
B1L278 = B1_i2c_state[0] & (B1L276 & (B1L277) # !B1L276 & B1L252) # !B1_i2c_state[0] & (B1L276);
--B1L279 is i2c_test:inst|Mux~22938 at LC_X10_Y8_N5
--operation mode is normal
B1L279 = B1_i2c_state[2] & B1_i2c_state[1] # !B1_i2c_state[2] & (B1_i2c_state[1] & (B1L275) # !B1_i2c_state[1] & B1L278);
--B1L280 is i2c_test:inst|Mux~22939 at LC_X10_Y8_N6
--operation mode is normal
B1L280 = B1_i2c_state[2] & (B1L279 & !B1_sda_buf # !B1L279 & (B1L268)) # !B1_i2c_state[2] & (B1L279);
--B1L281 is i2c_test:inst|Mux~22941 at LC_X8_Y6_N7
--operation mode is normal
B1L281 = B1L217 & B1_i2c_state[0];
--B1L282 is i2c_test:inst|Mux~22942 at LC_X8_Y6_N6
--operation mode is normal
B1L282 = !B1_i2c_state[0] & B1L217;
--B1L283 is i2c_test:inst|Mux~22943 at LC_X8_Y7_N9
--operation mode is normal
B1L283 = !B1_i2c_state[0] & (B1_phase1);
--B1L284 is i2c_test:inst|Mux~22944 at LC_X8_Y7_N1
--operation mode is normal
B1L284 = !B1_inner_state[0] & B1L197 & (B1_inner_state[3] # B1L283);
--B1L285 is i2c_test:inst|Mux~22945 at LC_X8_Y7_N2
--operation mode is normal
B1L285 = B1L300 & (B1_link # B1L284) # !B1L300 & (B1_phase3 & (!B1L284) # !B1_phase3 & B1_link);
--B1L286 is i2c_test:inst|Mux~22946 at LC_X9_Y6_N1
--operation mode is normal
B1L286 = !B1L197 & (B1_link # B1_phase3 & !B1_inner_state[3]);
--B1L287 is i2c_test:inst|Mux~22947 at LC_X9_Y6_N
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