i2c.fit.eqn

vhdl的很多例子

--operation mode is arithmetic

B1L136_cout_0 = !B1L133 # !B1_cnt_scan[9];
B1L136 = CARRY(B1L136_cout_0);

--B1L137 is i2c_test:inst|cnt_scan[9]~121COUT1_156 at LC_X7_Y9_N3
--operation mode is arithmetic

B1L137_cout_1 = !B1L134 # !B1_cnt_scan[9];
B1L137 = CARRY(B1L137_cout_1);


--B1_cnt_scan[10] is i2c_test:inst|cnt_scan[10] at LC_X7_Y9_N4
--operation mode is arithmetic

B1_cnt_scan[10]_carry_eqn = (!B1L125 & B1L136) # (B1L125 & B1L137);
B1_cnt_scan[10]_lut_out = B1_cnt_scan[10] $ (!B1_cnt_scan[10]_carry_eqn);
B1_cnt_scan[10] = DFFEAS(B1_cnt_scan[10]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );

--B1L139 is i2c_test:inst|cnt_scan[10]~125 at LC_X7_Y9_N4
--operation mode is arithmetic

B1L139 = CARRY(B1_cnt_scan[10] & (!B1L137));


--B1_cnt_scan[11] is i2c_test:inst|cnt_scan[11] at LC_X7_Y9_N5
--operation mode is normal

B1_cnt_scan[11]_carry_eqn = B1L139;
B1_cnt_scan[11]_lut_out = B1_cnt_scan[11] $ (B1_cnt_scan[11]_carry_eqn);
B1_cnt_scan[11] = DFFEAS(B1_cnt_scan[11]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L146 is i2c_test:inst|Equal~524 at LC_X7_Y9_N7
--operation mode is normal

B1L146 = B1_cnt_scan[11] & B1_cnt_scan[8] & B1_cnt_scan[10] & B1_cnt_scan[9];


--B1L147 is i2c_test:inst|Equal~525 at LC_X7_Y9_N8
--operation mode is normal

B1L147 = B1L145 & B1L144 & B1L146;


--B1_clk_div[4] is i2c_test:inst|clk_div[4] at LC_X6_Y6_N2
--operation mode is normal

B1_clk_div[4]_lut_out = B1L1 & (!B1L158 # !B1L148 # !B1_clk_div[5]);
B1_clk_div[4] = DFFEAS(B1_clk_div[4]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L148 is i2c_test:inst|Equal~526 at LC_X6_Y6_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_clk_div[7]_qfbk = B1_clk_div[7];
B1L148 = B1_clk_div[4] & !B1_clk_div[7]_qfbk & !B1_clk_div[1];

--B1_clk_div[7] is i2c_test:inst|clk_div[7] at LC_X6_Y6_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_clk_div[7] = DFFEAS(B1L148, GLOBAL(clk), GLOBAL(reset), , , B1L5, , , VCC);


--B1_clk_div[2] is i2c_test:inst|clk_div[2] at LC_X6_Y6_N1
--operation mode is normal

B1_clk_div[2]_lut_out = B1L9 & (!B1L158 # !B1L148 # !B1_clk_div[5]);
B1_clk_div[2] = DFFEAS(B1_clk_div[2]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_clk_div[6] is i2c_test:inst|clk_div[6] at LC_X5_Y6_N8
--operation mode is normal

B1_clk_div[6]_lut_out = B1L12 & (!B1_clk_div[5] # !B1L158 # !B1L148);
B1_clk_div[6] = DFFEAS(B1_clk_div[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L149 is i2c_test:inst|Equal~527 at LC_X6_Y6_N5
--operation mode is normal

B1L149 = !B1_clk_div[6] & !B1_clk_div[2] & B1L148;


--B1_clk_div[5] is i2c_test:inst|clk_div[5] at LC_X5_Y6_N9
--operation mode is normal

B1_clk_div[5]_lut_out = B1L15 & (!B1L148 # !B1L158 # !B1_clk_div[5]);
B1_clk_div[5] = DFFEAS(B1_clk_div[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_clk_div[0] is i2c_test:inst|clk_div[0] at LC_X6_Y6_N7
--operation mode is normal

B1_clk_div[0]_lut_out = B1L18 & (!B1L158 # !B1L148 # !B1_clk_div[5]);
B1_clk_div[0] = DFFEAS(B1_clk_div[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_clk_div[3] is i2c_test:inst|clk_div[3] at LC_X6_Y6_N3
--operation mode is normal

B1_clk_div[3]_lut_out = B1L21 & (!B1L158 # !B1L148 # !B1_clk_div[5]);
B1_clk_div[3] = DFFEAS(B1_clk_div[3]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L306 is i2c_test:inst|phase2~36 at LC_X7_Y6_N2
--operation mode is normal

B1L306 = !B1_clk_div[3] & B1_clk_div[5] & B1_clk_div[0];


--G1_cout is delay_reset_block:inst2|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|cout at LC_X13_Y7_N5
--operation mode is normal

G1_cout_carry_eqn = G1L28;
G1_cout = !G1_cout_carry_eqn;


--G2_cout is delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_1ub:auto_generated|cout at LC_X15_Y7_N5
--operation mode is normal

G2_cout_carry_eqn = G2L28;
G2_cout = !G2_cout_carry_eqn;


--B1L175 is i2c_test:inst|main_state[1]~1948 at LC_X11_Y7_N1
--operation mode is normal

B1L175 = rd & write & G2_cout & G1_cout;


--B1_cnt_delay[16] is i2c_test:inst|cnt_delay[16] at LC_X10_Y6_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[16]_lut_out = GND;
B1_cnt_delay[16] = DFFEAS(B1_cnt_delay[16]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L27, , , VCC);


--B1_cnt_delay[15] is i2c_test:inst|cnt_delay[15] at LC_X10_Y6_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[15]_lut_out = GND;
B1_cnt_delay[15] = DFFEAS(B1_cnt_delay[15]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L30, , , VCC);


--B1_cnt_delay[14] is i2c_test:inst|cnt_delay[14] at LC_X10_Y6_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[14]_lut_out = GND;
B1_cnt_delay[14] = DFFEAS(B1_cnt_delay[14]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L33, , , VCC);


--B1L150 is i2c_test:inst|Equal~528 at LC_X10_Y6_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[17]_qfbk = B1_cnt_delay[17];
B1L150 = !B1_cnt_delay[16] & !B1_cnt_delay[14] & !B1_cnt_delay[17]_qfbk & !B1_cnt_delay[15];

--B1_cnt_delay[17] is i2c_test:inst|cnt_delay[17] at LC_X10_Y6_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[17] = DFFEAS(B1L150, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L24, , , VCC);


--B1_cnt_delay[9] is i2c_test:inst|cnt_delay[9] at LC_X11_Y5_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[9]_lut_out = GND;
B1_cnt_delay[9] = DFFEAS(B1_cnt_delay[9]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L38, , , VCC);


--B1_cnt_delay[7] is i2c_test:inst|cnt_delay[7] at LC_X11_Y5_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[7]_lut_out = GND;
B1_cnt_delay[7] = DFFEAS(B1_cnt_delay[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L40, , , VCC);


--B1_cnt_delay[6] is i2c_test:inst|cnt_delay[6] at LC_X11_Y5_N8
--operation mode is normal

B1_cnt_delay[6]_lut_out = B1L43;
B1_cnt_delay[6] = DFFEAS(B1_cnt_delay[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1L151 is i2c_test:inst|Equal~529 at LC_X11_Y5_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[11]_qfbk = B1_cnt_delay[11];
B1L151 = !B1_cnt_delay[7] & !B1_cnt_delay[6] & !B1_cnt_delay[11]_qfbk & !B1_cnt_delay[9];

--B1_cnt_delay[11] is i2c_test:inst|cnt_delay[11] at LC_X11_Y5_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[11] = DFFEAS(B1L151, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L35, , , VCC);


--B1_cnt_delay[4] is i2c_test:inst|cnt_delay[4] at LC_X11_Y5_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[4]_lut_out = GND;
B1_cnt_delay[4] = DFFEAS(B1_cnt_delay[4]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L49, , , VCC);


--B1_cnt_delay[3] is i2c_test:inst|cnt_delay[3] at LC_X11_Y5_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[3]_lut_out = GND;
B1_cnt_delay[3] = DFFEAS(B1_cnt_delay[3]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L51, , , VCC);


--B1_cnt_delay[2] is i2c_test:inst|cnt_delay[2] at LC_X11_Y5_N7
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[2]_lut_out = GND;
B1_cnt_delay[2] = DFFEAS(B1_cnt_delay[2]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L54, , , VCC);


--B1L152 is i2c_test:inst|Equal~530 at LC_X11_Y5_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[5]_qfbk = B1_cnt_delay[5];
B1L152 = !B1_cnt_delay[3] & !B1_cnt_delay[2] & !B1_cnt_delay[5]_qfbk & !B1_cnt_delay[4];

--B1_cnt_delay[5] is i2c_test:inst|cnt_delay[5] at LC_X11_Y5_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[5] = DFFEAS(B1L152, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L46, , , VCC);


--B1_cnt_delay[0] is i2c_test:inst|cnt_delay[0] at LC_X10_Y6_N7
--operation mode is normal

B1_cnt_delay[0]_lut_out = B1L60 & (!B1L154 # !B1L156);
B1_cnt_delay[0] = DFFEAS(B1_cnt_delay[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1L153 is i2c_test:inst|Equal~531 at LC_X10_Y6_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[1]_qfbk = B1_cnt_delay[1];
B1L153 = !B1_cnt_delay[0] & !B1_cnt_delay[1]_qfbk;

--B1_cnt_delay[1] is i2c_test:inst|cnt_delay[1] at LC_X10_Y6_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

B1_cnt_delay[1] = DFFEAS(B1L153, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, B1L57, , , VCC);


--B1L154 is i2c_test:inst|Equal~532 at LC_X11_Y7_N4
--operation mode is normal

B1L154 = B1L151 & B1L153 & B1L152 & B1L150;


--B1_cnt_delay[19] is i2c_test:inst|cnt_delay[19] at LC_X13_Y6_N7
--operation mode is normal

B1_cnt_delay[19]_lut_out = B1L63 & (!B1L156 # !B1L154);
B1_cnt_delay[19] = DFFEAS(B1_cnt_delay[19]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1_cnt_delay[18] is i2c_test:inst|cnt_delay[18] at LC_X13_Y6_N6
--operation mode is normal

B1_cnt_delay[18]_lut_out = B1L64 & (!B1L156 # !B1L154);
B1_cnt_delay[18] = DFFEAS(B1_cnt_delay[18]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1_cnt_delay[13] is i2c_test:inst|cnt_delay[13] at LC_X13_Y6_N3
--operation mode is normal

B1_cnt_delay[13]_lut_out = B1L67 & (!B1L154 # !B1L156);
B1_cnt_delay[13] = DFFEAS(B1_cnt_delay[13]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1_cnt_delay[12] is i2c_test:inst|cnt_delay[12] at LC_X13_Y6_N8
--operation mode is normal

B1_cnt_delay[12]_lut_out = B1L70 & (!B1L154 # !B1L156);
B1_cnt_delay[12] = DFFEAS(B1_cnt_delay[12]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1L155 is i2c_test:inst|Equal~533 at LC_X13_Y6_N1
--operation mode is normal

B1L155 = B1_cnt_delay[13] & B1_cnt_delay[19] & B1_cnt_delay[18] & B1_cnt_delay[12];


--B1_cnt_delay[10] is i2c_test:inst|cnt_delay[10] at LC_X13_Y6_N5
--operation mode is normal

B1_cnt_delay[10]_lut_out = B1L73 & (!B1L154 # !B1L156);
B1_cnt_delay[10] = DFFEAS(B1_cnt_delay[10]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1_cnt_delay[8] is i2c_test:inst|cnt_delay[8] at LC_X13_Y6_N9
--operation mode is normal

B1_cnt_delay[8]_lut_out = B1L76 & (!B1L154 # !B1L156);
B1_cnt_delay[8] = DFFEAS(B1_cnt_delay[8]_lut_out, GLOBAL(clk), GLOBAL(reset), , B1_start_delaycnt, , , , );


--B1L156 is i2c_test:inst|Equal~534 at LC_X13_Y6_N2
--operation mode is normal

B1L156 = B1_cnt_delay[8] & B1_cnt_delay[10] & B1L155;


--B1L176 is i2c_test:inst|main_state[1]~1949 at LC_X11_Y7_N2
--operation mode is normal

B1L176 = B1L175 # !B1L156 # !B1L154;


--B1_inner_state[1] is i2c_test:inst|inner_state[1] at LC_X9_Y7_N5
--operation mode is normal

B1_inner_state[1]_lut_out = B1_main_state[0] & (B1L205) # !B1_main_state[0] & B1_main_state[1] & B1L208;
B1_inner_state[1] = DFFEAS(B1_inner_state[1]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_inner_state[2] is i2c_test:inst|inner_state[2] at LC_X8_Y9_N5
--operation mode is normal

B1_inner_state[2]_lut_out = B1_main_state[0] & (B1L211) # !B1_main_state[0] & B1_main_state[1] & B1L216;
B1_inner_state[2] = DFFEAS(B1_inner_state[2]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1L197 is i2c_test:inst|Mux~22852 at LC_X9_Y7_N2
--operation mode is normal

B1L197 = !B1_inner_state[1] & !B1_inner_state[2];


--B1_i2c_state[0] is i2c_test:inst|i2c_state[0] at LC_X8_Y7_N7
--operation mode is normal

B1_i2c_state[0]_lut_out = B1_main_state[0] & (B1_main_state[1] & B1_i2c_state[0] # !B1_main_state[1] & (B1L302)) # !B1_main_state[0] & (B1_main_state[1] & B1L302);
B1_i2c_state[0] = DFFEAS(B1_i2c_state[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_i2c_state[1] is i2c_test:inst|i2c_state[1] at LC_X9_Y10_N6
--operation mode is normal

B1_i2c_state[1]_lut_out = B1_i2c_state[1] & (B1L219 & B1L218 # !B1L201) # !B1_i2c_state[1] & B1L219 & (B1L218);
B1_i2c_state[1] = DFFEAS(B1_i2c_state[1]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_inner_state[0] is i2c_test:inst|inner_state[0] at LC_X9_Y9_N9
--operation mode is normal

B1_inner_state[0]_lut_out = B1_main_state[1] & (B1L233 # B1_main_state[0] & B1L229) # !B1_main_state[1] & B1_main_state[0] & (B1L229);
B1_inner_state[0] = DFFEAS(B1_inner_state[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_phase3 is i2c_test:inst|phase3 at LC_X9_Y9_N0
--operation mode is normal

B1_phase3_lut_out = B1_phase3 # B1L160;
B1_phase3 = DFFEAS(B1_phase3_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , B1_phase3, );


--B1L177 is i2c_test:inst|main_state[1]~1950 at LC_X8_Y8_N4
--operation mode is normal

B1L177 = B1_inner_state[2] & (B1_inner_state[0]) # !B1_inner_state[2] & B1_inner_state[1] & (B1_phase3 # B1_inner_state[0]);


--B1_inner_state[3] is i2c_test:inst|inner_state[3] at LC_X9_Y7_N6
--operation mode is normal

B1_inner_state[3]_lut_out = B1L298 & (B1L299 & B1_inner_state[3] # !B1L299 & (B1L301)) # !B1L298 & (B1L299 & B1L301);
B1_inner_state[3] = DFFEAS(B1_inner_state[3]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );


--B1_phase1 is i2c_test:inst|phase1 at LC_X9_Y7_N1
--operation mode is normal

B1_phase1_lut_out = B1_phase1 # B1L161;
B1_phase1 = DFFEAS(B1_phase1_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , B1_phase1, );


--B1_sda_buf is i2c_test:inst|sda_buf at LC_X9_Y8_N0
--operation mode is normal

B1_sda_buf_lut_out = B1_main_state[0] & (!B1L259) # !B1_main_state[0] & B1_main_state[1] & !B1L280;
B1_sda_buf = DFFEAS(B1_sda_buf_lut_out, GLOBAL(clk), GLOBAL(reset), , , , , , );