tt.map.eqn

vhdl的很多例子

--B1_DCLK_DIV[8] is ADC_TLC549:inst|DCLK_DIV[8]
--operation mode is arithmetic

B1_DCLK_DIV[8]_carry_eqn = B1L31;
B1_DCLK_DIV[8]_lut_out = B1_DCLK_DIV[8] $ (!B1_DCLK_DIV[8]_carry_eqn);
B1_DCLK_DIV[8] = DFFEAS(B1_DCLK_DIV[8]_lut_out, clk, VCC, , , , , B1L41, );

--B1L33 is ADC_TLC549:inst|DCLK_DIV[8]~177
--operation mode is arithmetic

B1L33 = CARRY(B1_DCLK_DIV[8] & (!B1L31));


--B1_DCLK_DIV[9] is ADC_TLC549:inst|DCLK_DIV[9]
--operation mode is arithmetic

B1_DCLK_DIV[9]_carry_eqn = B1L33;
B1_DCLK_DIV[9]_lut_out = B1_DCLK_DIV[9] $ (B1_DCLK_DIV[9]_carry_eqn);
B1_DCLK_DIV[9] = DFFEAS(B1_DCLK_DIV[9]_lut_out, clk, VCC, , , , , B1L41, );

--B1L35 is ADC_TLC549:inst|DCLK_DIV[9]~181
--operation mode is arithmetic

B1L35 = CARRY(!B1L33 # !B1_DCLK_DIV[9]);


--B1L39 is ADC_TLC549:inst|LessThan~289
--operation mode is normal

B1L39 = !B1_DCLK_DIV[6] & !B1_DCLK_DIV[7] & !B1_DCLK_DIV[8] & !B1_DCLK_DIV[9];


--B1_DCLK_DIV[1] is ADC_TLC549:inst|DCLK_DIV[1]
--operation mode is arithmetic

B1_DCLK_DIV[1]_carry_eqn = B1L17;
B1_DCLK_DIV[1]_lut_out = B1_DCLK_DIV[1] $ (B1_DCLK_DIV[1]_carry_eqn);
B1_DCLK_DIV[1] = DFFEAS(B1_DCLK_DIV[1]_lut_out, clk, VCC, , , , , B1L41, );

--B1L19 is ADC_TLC549:inst|DCLK_DIV[1]~185
--operation mode is arithmetic

B1L19 = CARRY(!B1L17 # !B1_DCLK_DIV[1]);


--B1_DCLK_DIV[2] is ADC_TLC549:inst|DCLK_DIV[2]
--operation mode is arithmetic

B1_DCLK_DIV[2]_carry_eqn = B1L19;
B1_DCLK_DIV[2]_lut_out = B1_DCLK_DIV[2] $ (!B1_DCLK_DIV[2]_carry_eqn);
B1_DCLK_DIV[2] = DFFEAS(B1_DCLK_DIV[2]_lut_out, clk, VCC, , , , , B1L41, );

--B1L21 is ADC_TLC549:inst|DCLK_DIV[2]~189
--operation mode is arithmetic

B1L21 = CARRY(B1_DCLK_DIV[2] & (!B1L19));


--B1_DCLK_DIV[3] is ADC_TLC549:inst|DCLK_DIV[3]
--operation mode is arithmetic

B1_DCLK_DIV[3]_carry_eqn = B1L21;
B1_DCLK_DIV[3]_lut_out = B1_DCLK_DIV[3] $ (B1_DCLK_DIV[3]_carry_eqn);
B1_DCLK_DIV[3] = DFFEAS(B1_DCLK_DIV[3]_lut_out, clk, VCC, , , , , B1L41, );

--B1L23 is ADC_TLC549:inst|DCLK_DIV[3]~193
--operation mode is arithmetic

B1L23 = CARRY(!B1L21 # !B1_DCLK_DIV[3]);


--B1_DCLK_DIV[4] is ADC_TLC549:inst|DCLK_DIV[4]
--operation mode is arithmetic

B1_DCLK_DIV[4]_carry_eqn = B1L23;
B1_DCLK_DIV[4]_lut_out = B1_DCLK_DIV[4] $ (!B1_DCLK_DIV[4]_carry_eqn);
B1_DCLK_DIV[4] = DFFEAS(B1_DCLK_DIV[4]_lut_out, clk, VCC, , , , , B1L41, );

--B1L25 is ADC_TLC549:inst|DCLK_DIV[4]~197
--operation mode is arithmetic

B1L25 = CARRY(B1_DCLK_DIV[4] & (!B1L23));


--B1L40 is ADC_TLC549:inst|LessThan~290
--operation mode is normal

B1L40 = !B1_DCLK_DIV[1] & !B1_DCLK_DIV[2] & !B1_DCLK_DIV[3] # !B1_DCLK_DIV[4];


--B1_DCLK_DIV[5] is ADC_TLC549:inst|DCLK_DIV[5]
--operation mode is arithmetic

B1_DCLK_DIV[5]_carry_eqn = B1L25;
B1_DCLK_DIV[5]_lut_out = B1_DCLK_DIV[5] $ (B1_DCLK_DIV[5]_carry_eqn);
B1_DCLK_DIV[5] = DFFEAS(B1_DCLK_DIV[5]_lut_out, clk, VCC, , , , , B1L41, );

--B1L27 is ADC_TLC549:inst|DCLK_DIV[5]~201
--operation mode is arithmetic

B1L27 = CARRY(!B1L25 # !B1_DCLK_DIV[5]);


--B1_DCLK_DIV[10] is ADC_TLC549:inst|DCLK_DIV[10]
--operation mode is normal

B1_DCLK_DIV[10]_carry_eqn = B1L35;
B1_DCLK_DIV[10]_lut_out = B1_DCLK_DIV[10] $ (!B1_DCLK_DIV[10]_carry_eqn);
B1_DCLK_DIV[10] = DFFEAS(B1_DCLK_DIV[10]_lut_out, clk, VCC, , , , , B1L41, );


--B1L41 is ADC_TLC549:inst|LessThan~291
--operation mode is normal

B1L41 = B1_DCLK_DIV[10] # !B1L40 & B1_DCLK_DIV[5] # !B1L39;


--B1_COUNTER[1] is ADC_TLC549:inst|COUNTER[1]
--operation mode is arithmetic

B1_COUNTER[1]_carry_eqn = B1L7;
B1_COUNTER[1]_lut_out = B1_COUNTER[1] $ (B1_COUNTER[1]_carry_eqn);
B1_COUNTER[1] = DFFEAS(B1_COUNTER[1]_lut_out, B1_AD_CLK_r, VCC, , , , , , );

--B1L9 is ADC_TLC549:inst|COUNTER[1]~60
--operation mode is arithmetic

B1L9 = CARRY(!B1L7 # !B1_COUNTER[1]);


--B1_COUNTER[2] is ADC_TLC549:inst|COUNTER[2]
--operation mode is arithmetic

B1_COUNTER[2]_carry_eqn = B1L9;
B1_COUNTER[2]_lut_out = B1_COUNTER[2] $ (!B1_COUNTER[2]_carry_eqn);
B1_COUNTER[2] = DFFEAS(B1_COUNTER[2]_lut_out, B1_AD_CLK_r, VCC, , , , , , );

--B1L11 is ADC_TLC549:inst|COUNTER[2]~64
--operation mode is arithmetic

B1L11 = CARRY(B1_COUNTER[2] & (!B1L9));


--B1L37 is ADC_TLC549:inst|Equal~104
--operation mode is normal

B1L37 = !B1_COUNTER[1] & !B1_COUNTER[2];


--B1_COUNTER[0] is ADC_TLC549:inst|COUNTER[0]
--operation mode is arithmetic

B1_COUNTER[0]_lut_out = !B1_COUNTER[0];
B1_COUNTER[0] = DFFEAS(B1_COUNTER[0]_lut_out, B1_AD_CLK_r, VCC, , , , , , );

--B1L7 is ADC_TLC549:inst|COUNTER[0]~68
--operation mode is arithmetic

B1L7 = CARRY(B1_COUNTER[0]);


--B1_COUNTER[4] is ADC_TLC549:inst|COUNTER[4]
--operation mode is normal

B1_COUNTER[4]_carry_eqn = B1L13;
B1_COUNTER[4]_lut_out = B1_COUNTER[4] $ (!B1_COUNTER[4]_carry_eqn);
B1_COUNTER[4] = DFFEAS(B1_COUNTER[4]_lut_out, B1_AD_CLK_r, VCC, , , , , , );


--B1_COUNTER[3] is ADC_TLC549:inst|COUNTER[3]
--operation mode is arithmetic

B1_COUNTER[3]_carry_eqn = B1L11;
B1_COUNTER[3]_lut_out = B1_COUNTER[3] $ (B1_COUNTER[3]_carry_eqn);
B1_COUNTER[3] = DFFEAS(B1_COUNTER[3]_lut_out, B1_AD_CLK_r, VCC, , , , , , );

--B1L13 is ADC_TLC549:inst|COUNTER[3]~76
--operation mode is arithmetic

B1L13 = CARRY(!B1L11 # !B1_COUNTER[3]);


--C1_count[11] is bin27seg:inst1|count[11]
--operation mode is arithmetic

C1_count[11]_carry_eqn = C1L42;
C1_count[11]_lut_out = C1_count[11] $ (C1_count[11]_carry_eqn);
C1_count[11] = DFFEAS(C1_count[11]_lut_out, clk, VCC, , , , , , );

--C1L44 is bin27seg:inst1|count[11]~272
--operation mode is arithmetic

C1L44 = CARRY(!C1L42 # !C1_count[11]);


--P2L1 is bin27seg:inst1|lpm_divide:div_rtl_1|lpm_divide_vmf:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[2]~46
--operation mode is normal

P2L1_carry_eqn = P2L3;
P2L1 = !P2L1_carry_eqn;


--W2L1 is bin27seg:inst1|lpm_divide:div_rtl_3|lpm_divide_2nf:auto_generated|sign_div_unsign_4jg:divider|alt_u_div_dod:divider|add_sub_re8:add_sub_11|add_sub_cella[3]~68
--operation mode is normal

W2L1_carry_eqn = W2L3;
W2L1 = !W2L1_carry_eqn;


--LB2L1 is bin27seg:inst1|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~152
--operation mode is arithmetic

LB2L1_carry_eqn = LB2L10;
LB2L1 = B1_data_out[6] $ GB1_romout[0][8] $ !LB2L1_carry_eqn;

--LB2L2 is bin27seg:inst1|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~154
--operation mode is arithmetic

LB2L2 = CARRY(B1_data_out[6] & (GB1_romout[0][8] # !LB2L10) # !B1_data_out[6] & GB1_romout[0][8] & !LB2L10);


--C1L67 is bin27seg:inst1|datain[3][0]~91
--operation mode is arithmetic

C1L67 = CARRY(!AB1L30 & !AB1L29 & !C1L68);


--W1L4 is bin27seg:inst1|lpm_divide:div_rtl_3|lpm_divide_2nf:auto_generated|sign_div_unsign_4jg:divider|alt_u_div_dod:divider|add_sub_re8:add_sub_10|add_sub_cella[3]~69
--operation mode is normal

W1L4_carry_eqn = W1L6;
W1L4 = !W1L4_carry_eqn;


--P19L4 is bin27seg:inst1|lpm_divide:mod_rtl_4|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[2]~46
--operation mode is normal

P19L4_carry_eqn = P19L10;
P19L4 = !P19L4_carry_eqn;


--P19_add_sub_cella[1] is bin27seg:inst1|lpm_divide:mod_rtl_4|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[1]
--operation mode is arithmetic

P19_add_sub_cella[1] = W1L4;

--P19L3 is bin27seg:inst1|lpm_divide:mod_rtl_4|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[1]~COUT
--operation mode is arithmetic

P19L3 = CARRY(W1L4);


--P1L4 is bin27seg:inst1|lpm_divide:div_rtl_1|lpm_divide_vmf:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_10|add_sub_cella[2]~47
--operation mode is normal

P1L4_carry_eqn = P1L6;
P1L4 = !P1L4_carry_eqn;


--P10L4 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[2]~46
--operation mode is normal

P10L4_carry_eqn = P10L10;
P10L4 = !P10L4_carry_eqn;


--P10_add_sub_cella[1] is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[1]
--operation mode is arithmetic

P10_add_sub_cella[1] = P1L4;

--P10L3 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[1]~COUT
--operation mode is arithmetic

P10L3 = CARRY(P1L4);


--LB2L3 is bin27seg:inst1|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~157
--operation mode is arithmetic

LB2L3_carry_eqn = LB2L2;
LB2L3 = B1_data_out[7] $ GB1_romout[0][9] $ LB2L3_carry_eqn;

--LB2L4 is bin27seg:inst1|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~159
--operation mode is arithmetic

LB2L4 = CARRY(B1_data_out[7] & !GB1_romout[0][9] & !LB2L2 # !B1_data_out[7] & (!LB2L2 # !GB1_romout[0][9]));


--P27L4 is bin27seg:inst1|lpm_divide:mod_rtl_5|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[2]~46
--operation mode is normal

P27L4_carry_eqn = P27L10;
P27L4 = !P27L4_carry_eqn;


--P27_add_sub_cella[1] is bin27seg:inst1|lpm_divide:mod_rtl_5|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[1]
--operation mode is arithmetic

P27_add_sub_cella[1] = LB2L3;

--P27L3 is bin27seg:inst1|lpm_divide:mod_rtl_5|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[1]~COUT
--operation mode is arithmetic

P27L3 = CARRY(LB2L3);


--DB1L4 is bin27seg:inst1|lpm_divide:div_rtl_6|lpm_divide_cof:auto_generated|sign_div_unsign_ekg:divider|alt_u_div_1rd:divider|add_sub_5g8:add_sub_10|add_sub_cella[4]~90
--operation mode is normal

DB1L4_carry_eqn = DB1L8;
DB1L4 = !DB1L4_carry_eqn;


--P10L5 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[2]~51
--operation mode is arithmetic

P10L5_carry_eqn = P10L12;
P10L5 = P10L5_carry_eqn $ (!J2L25 & !J2L26);

--P10L6 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_11|add_sub_cella[2]~53
--operation mode is arithmetic

P10L6 = CARRY(!J2L25 & !J2L26 & !P10L12);


--P9L4 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_10|add_sub_cella[2]~46
--operation mode is normal

P9L4_carry_eqn = P9L8;
P9L4 = !P9L4_carry_eqn;


--P9_add_sub_cella[1] is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_10|add_sub_cella[1]
--operation mode is arithmetic

P9_add_sub_cella[1] = P8L4;

--P9L3 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_10|add_sub_cella[1]~COUT
--operation mode is arithmetic

P9L3 = CARRY(P8L4);


--J2L26 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|StageOut[51]~18
--operation mode is normal

J2L26 = P9L4 & (!P9_add_sub_cella[1]);


--P8L4 is bin27seg:inst1|lpm_divide:div_rtl_1|lpm_divide_vmf:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|add_sub_oe8:add_sub_9|add_sub_cella[2]~47
--operation mode is normal

P8L4_carry_eqn = P8L6;
P8L4 = !P8L4_carry_eqn;


--J2L25 is bin27seg:inst1|lpm_divide:mod_rtl_2|lpm_divide_2ff:auto_generated|sign_div_unsign_1jg:divider|alt_u_div_7od:divider|StageOut[51]~13
--operation mode is normal

J2L25 = P8L4 & (!P9L4);