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📄 tt.fit.eqn

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-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--B1_AD_CLK_r is ADC_TLC549:inst|AD_CLK_r at LC_X8_Y10_N6
--operation mode is normal

B1_AD_CLK_r_lut_out = B1_AD_CLK_r $ (B1L53);
B1_AD_CLK_r = DFFEAS(B1_AD_CLK_r_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1_AD_CLK_EN is ADC_TLC549:inst|AD_CLK_EN at LC_X11_Y10_N5
--operation mode is normal

B1_AD_CLK_EN_lut_out = B1L50 & (B1_AD_CLK_EN) # !B1L50 & (B1_AD_CLK_EN & !B1L54 # !B1L55);
B1_AD_CLK_EN = DFFEAS(B1_AD_CLK_EN_lut_out, GLOBAL(B1_AD_CLK_r), VCC, , , , , , );


--B1L3 is ADC_TLC549:inst|AD_CLK~2 at LC_X9_Y10_N2
--operation mode is normal

B1L3 = B1_AD_CLK_r # !B1_AD_CLK_EN;


--B1_AD_CS is ADC_TLC549:inst|AD_CS at LC_X11_Y10_N7
--operation mode is normal

B1_AD_CS_lut_out = !B1L50 & (B1L54 # B1_AD_CS);
B1_AD_CS = DFFEAS(B1_AD_CS_lut_out, GLOBAL(B1_AD_CLK_r), VCC, , , , , , );


--C1_count[13] is bin27seg:inst1|count[13] at LC_X32_Y14_N6
--operation mode is arithmetic

C1_count[13]_carry_eqn = (!C1L53 & C1L55) # (C1L53 & C1L56);
C1_count[13]_lut_out = C1_count[13] $ (C1_count[13]_carry_eqn);
C1_count[13] = DFFEAS(C1_count[13]_lut_out, GLOBAL(clk), VCC, , , , , , );

--C1L58 is bin27seg:inst1|count[13]~260 at LC_X32_Y14_N6
--operation mode is arithmetic

C1L58_cout_0 = !C1L55 # !C1_count[13];
C1L58 = CARRY(C1L58_cout_0);

--C1L59 is bin27seg:inst1|count[13]~260COUT1_330 at LC_X32_Y14_N6
--operation mode is arithmetic

C1L59_cout_1 = !C1L56 # !C1_count[13];
C1L59 = CARRY(C1L59_cout_1);


--C1_count[12] is bin27seg:inst1|count[12] at LC_X32_Y14_N5
--operation mode is arithmetic

C1_count[12]_carry_eqn = C1L53;
C1_count[12]_lut_out = C1_count[12] $ !C1_count[12]_carry_eqn;
C1_count[12] = DFFEAS(C1_count[12]_lut_out, GLOBAL(clk), VCC, , , , , , );

--C1L55 is bin27seg:inst1|count[12]~264 at LC_X32_Y14_N5
--operation mode is arithmetic

C1L55_cout_0 = C1_count[12] & !C1L53;
C1L55 = CARRY(C1L55_cout_0);

--C1L56 is bin27seg:inst1|count[12]~264COUT1_329 at LC_X32_Y14_N5
--operation mode is arithmetic

C1L56_cout_1 = C1_count[12] & !C1L53;
C1L56 = CARRY(C1L56_cout_1);


--C1_count[14] is bin27seg:inst1|count[14] at LC_X32_Y14_N7
--operation mode is normal

C1_count[14]_carry_eqn = (!C1L53 & C1L58) # (C1L53 & C1L59);
C1_count[14]_lut_out = C1_count[14] $ (!C1_count[14]_carry_eqn);
C1_count[14] = DFFEAS(C1_count[14]_lut_out, GLOBAL(clk), VCC, , , , , , );


--C1L1 is bin27seg:inst1|Decoder~163 at LC_X31_Y14_N8
--operation mode is normal

C1L1 = C1_count[12] & C1_count[14] & C1_count[13];


--C1L2 is bin27seg:inst1|Decoder~164 at LC_X31_Y14_N2
--operation mode is normal

C1L2 = !C1_count[12] & C1_count[14] & C1_count[13];


--C1L3 is bin27seg:inst1|Decoder~165 at LC_X31_Y14_N9
--operation mode is normal

C1L3 = C1_count[12] & C1_count[14] & !C1_count[13];


--C1L4 is bin27seg:inst1|Decoder~166 at LC_X31_Y14_N5
--operation mode is normal

C1L4 = !C1_count[12] & C1_count[14] & !C1_count[13];


--C1L5 is bin27seg:inst1|Decoder~167 at LC_X31_Y14_N0
--operation mode is normal

C1L5 = C1_count[12] & !C1_count[14] & C1_count[13];


--C1L6 is bin27seg:inst1|Decoder~168 at LC_X31_Y14_N7
--operation mode is normal

C1L6 = !C1_count[12] & !C1_count[14] & C1_count[13];


--C1L7 is bin27seg:inst1|Decoder~169 at LC_X32_Y14_N8
--operation mode is normal

C1L7 = C1_count[12] & !C1_count[14] & !C1_count[13];


--C1L8 is bin27seg:inst1|Decoder~170 at LC_X32_Y14_N9
--operation mode is normal

C1L8 = !C1_count[12] & !C1_count[14] & !C1_count[13];


--C1L9 is bin27seg:inst1|bcd_led[0]~167 at LC_X24_Y14_N6
--operation mode is normal

C1L9 = C1_count[13] & (C1_count[12] # C1_datain[2][0]) # !C1_count[13] & !C1_count[12] & (C1_datain[0][0]);


--C1_datain[3][0] is bin27seg:inst1|datain[3][0] at LC_X20_Y14_N8
--operation mode is normal

C1_datain[3][0]_carry_eqn = (!C1L87 & C1L79) # (C1L87 & C1L80);
C1_datain[3][0]_lut_out = !C1_datain[3][0]_carry_eqn;
C1_datain[3][0] = DFFEAS(C1_datain[3][0]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1L10 is bin27seg:inst1|bcd_led[0]~168 at LC_X20_Y14_N9
--operation mode is normal

C1L10 = C1_count[12] & (C1L9 & C1_datain[3][0] # !C1L9 & (C1_datain[1][0])) # !C1_count[12] & (C1L9);


--C1L11 is bin27seg:inst1|bcd_led[0]~169 at LC_X33_Y14_N8
--operation mode is normal

C1L11 = !C1_count[14] & (C1L10);


--C1_datain[2][1] is bin27seg:inst1|datain[2][1] at LC_X19_Y15_N2
--operation mode is normal

C1_datain[2][1]_lut_out = P19L5 & (!P19_add_sub_cella[1]) # !P19L5 & W1L5;
C1_datain[2][1] = DFFEAS(C1_datain[2][1]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1_datain[1][1] is bin27seg:inst1|datain[1][1] at LC_X20_Y13_N1
--operation mode is normal

C1_datain[1][1]_lut_out = P10L5 & (!P10_add_sub_cella[1]) # !P10L5 & P1L5;
C1_datain[1][1] = DFFEAS(C1_datain[1][1]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1_datain[0][1] is bin27seg:inst1|datain[0][1] at LC_X22_Y15_N7
--operation mode is normal

C1_datain[0][1]_lut_out = P27L5 & !P27_add_sub_cella[1] # !P27L5 & (LB2L4);
C1_datain[0][1] = DFFEAS(C1_datain[0][1]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1L12 is bin27seg:inst1|bcd_led[1]~170 at LC_X24_Y14_N4
--operation mode is normal

C1L12 = C1_count[13] & C1_count[12] # !C1_count[13] & (C1_count[12] & (C1_datain[1][1]) # !C1_count[12] & C1_datain[0][1]);


--C1L13 is bin27seg:inst1|bcd_led[1]~171 at LC_X24_Y14_N5
--operation mode is normal

C1L13 = C1_count[13] & (C1L12 & C1_datain[3][1] # !C1L12 & (C1_datain[2][1])) # !C1_count[13] & (C1L12);


--C1L14 is bin27seg:inst1|bcd_led[1]~172 at LC_X33_Y14_N3
--operation mode is normal

C1L14 = !C1_count[14] & (C1L13);


--C1_datain[1][2] is bin27seg:inst1|datain[1][2] at LC_X20_Y13_N0
--operation mode is normal

C1_datain[1][2]_lut_out = P10L5 & P10L6 # !P10L5 & (J2L26 # J2L25);
C1_datain[1][2] = DFFEAS(C1_datain[1][2]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1_datain[2][2] is bin27seg:inst1|datain[2][2] at LC_X19_Y14_N0
--operation mode is normal

C1_datain[2][2]_lut_out = P19L5 & (P19L6) # !P19L5 & (J3L8 # J3L7);
C1_datain[2][2] = DFFEAS(C1_datain[2][2]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1_datain[0][2] is bin27seg:inst1|datain[0][2] at LC_X22_Y15_N5
--operation mode is normal

C1_datain[0][2]_lut_out = P27L5 & P27L6 # !P27L5 & (J4L44 # J4L43);
C1_datain[0][2] = DFFEAS(C1_datain[0][2]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1L15 is bin27seg:inst1|bcd_led[2]~173 at LC_X31_Y14_N1
--operation mode is normal

C1L15 = C1_count[13] & (C1_count[12] # C1_datain[2][2]) # !C1_count[13] & !C1_count[12] & C1_datain[0][2];


--C1L16 is bin27seg:inst1|bcd_led[2]~174 at LC_X31_Y14_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_datain[3][2]_qfbk = C1_datain[3][2];
C1L16 = C1L15 & (C1_datain[3][2]_qfbk # !C1_count[12]) # !C1L15 & C1_count[12] & (C1_datain[1][2]);

--C1_datain[3][2] is bin27seg:inst1|datain[3][2] at LC_X31_Y14_N6
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

C1_datain[3][2] = DFFEAS(C1L16, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , CB1L5, , , VCC);


--C1L17 is bin27seg:inst1|bcd_led[2]~175 at LC_X31_Y14_N3
--operation mode is normal

C1L17 = !C1_count[14] & C1L16;


--C1_datain[2][3] is bin27seg:inst1|datain[2][3] at LC_X19_Y14_N4
--operation mode is normal

C1_datain[2][3]_lut_out = P19L5 & (P19L9) # !P19L5 & (J3L9 # J3L10);
C1_datain[2][3] = DFFEAS(C1_datain[2][3]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1_datain[1][3] is bin27seg:inst1|datain[1][3] at LC_X20_Y13_N4
--operation mode is normal

C1_datain[1][3]_lut_out = P10L5 & (P10L9) # !P10L5 & (J2L27 # J2L28);
C1_datain[1][3] = DFFEAS(C1_datain[1][3]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1_datain[0][3] is bin27seg:inst1|datain[0][3] at LC_X21_Y15_N8
--operation mode is normal

C1_datain[0][3]_lut_out = P27L5 & (P27L9) # !P27L5 & (J4L46 # J4L45);
C1_datain[0][3] = DFFEAS(C1_datain[0][3]_lut_out, !GLOBAL(B1_AD_CS), GLOBAL(reset), , , , , , );


--C1L18 is bin27seg:inst1|bcd_led[3]~176 at LC_X24_Y14_N2
--operation mode is normal

C1L18 = C1_count[13] & C1_count[12] # !C1_count[13] & (C1_count[12] & C1_datain[1][3] # !C1_count[12] & (C1_datain[0][3]));


--C1L19 is bin27seg:inst1|bcd_led[3]~177 at LC_X33_Y14_N6
--operation mode is normal

C1L19 = !C1_count[14] & (C1L18 & !C1_count[13] # !C1L18 & C1_count[13] & C1_datain[2][3]);


--C1L110 is bin27seg:inst1|seg_data[6]~69 at LC_X33_Y14_N1
--operation mode is normal

C1L110 = C1L11 & (C1L19 # C1L17 $ C1L14) # !C1L11 & (C1L14 # C1L17 $ C1L19);


--C1L109 is bin27seg:inst1|seg_data[5]~70 at LC_X33_Y14_N9
--operation mode is normal

C1L109 = C1L17 & C1L11 & (C1L14 $ C1L19) # !C1L17 & !C1L19 & (C1L14 # C1L11);


--C1L108 is bin27seg:inst1|seg_data[4]~71 at LC_X33_Y14_N5
--operation mode is normal

C1L108 = C1L14 & (C1L11 & !C1L19) # !C1L14 & (C1L17 & (!C1L19) # !C1L17 & C1L11);


--C1L107 is bin27seg:inst1|seg_data[3]~72 at LC_X33_Y14_N0
--operation mode is normal

C1L107 = C1L14 & (C1L17 & C1L11 # !C1L17 & !C1L11 & C1L19) # !C1L14 & !C1L19 & (C1L17 $ C1L11);


--C1L106 is bin27seg:inst1|seg_data[2]~73 at LC_X33_Y14_N7
--operation mode is normal

C1L106 = C1L17 & C1L19 & (C1L14 # !C1L11) # !C1L17 & C1L14 & !C1L11 & !C1L19;


--C1L105 is bin27seg:inst1|seg_data[1]~74 at LC_X33_Y14_N2
--operation mode is normal

C1L105 = C1L14 & (C1L11 & (C1L19) # !C1L11 & C1L17) # !C1L14 & C1L17 & (C1L11 $ C1L19);


--C1L104 is bin27seg:inst1|seg_data[0]~75 at LC_X33_Y14_N4
--operation mode is normal

C1L104 = C1L17 & !C1L14 & (C1L11 $ !C1L19) # !C1L17 & C1L11 & (C1L14 $ !C1L19);


--B1_DCLK_DIV[6] is ADC_TLC549:inst|DCLK_DIV[6] at LC_X8_Y10_N1
--operation mode is arithmetic

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