smallcore.fit.smsg

MagicSopc DDR-Sdram

    Info: Pin "SDRAM_CS_n" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "LED[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Delay annotation completed successfully
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Info: Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements.
Info: Node sld_hub:sld_hub_inst|CLR_SIGNAL~clkctrl uses non-global routing resources to route signals to global destination nodes
    Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[3] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[4] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[1] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2] -- routed using non-global resources
Info: Node sld_hub:sld_hub_inst|node_clrn~clkctrl uses non-global routing resources to route signals to global destination nodes
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonRd1 -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|resetrequest -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonRd -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|jtag_break -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|probepresent -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|read_req -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[5] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[9] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[9] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[6] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[3] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[8] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[7] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|count[8] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[7] -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|td_shift[4] -- routed using non-global resources
Info: Node altera_internal_jtag~UPDATEUSERclkctrl uses non-global routing resources to route signals to global destination nodes
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|st_updateir~_emulated -- routed using non-global resources
    Info: Port clear -- assigned as a global for destination node nios2e_2C35:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|st_shiftdr -- routed using non-global resources
Info: Following groups of pins have the same output enable
    Info: Following pins have the same output enable: group 1
        Info: Type bidirectional pin SDRAM_DQ[12] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[4] uses the SSTL-2 Class I I/O standard
        Info: Type output pin SDRAM_DM[0] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[13] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[9] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[5] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[1] uses the SSTL-2 Class I I/O standard
        Info: Type output pin SDRAM_DM[1] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[14] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[10] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[6] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[2] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQS[0] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[15] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[11] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[7] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[3] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQS[1] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[8] uses the SSTL-2 Class I I/O standard
        Info: Type bidirectional pin SDRAM_DQ[0] uses the SSTL-2 Class I I/O standard
Info: Quartus II Fitter was successful. 0 errors, 27 warnings
    Info: Allocated 239 megabytes of memory during processing
    Info: Processing ended: Tue Jul 03 16:03:23 2007
    Info: Elapsed time: 00:01:40