adder4.v

来自「VHDL教程及源码,是新手入门的不二选择!」· Verilog 代码 · 共 8 行

module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule