step_motor.tan.qmsg

本程序设计一个基于FPGA的4相步进电机定位控制系统。由步进电机方向设定电路模块、步进电机步进移动与定位控制模块和编码输出模块构成。前两个模块完成电机旋转方向设定

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" {  } { { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 9 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register angleDnCount\[3\] register angleDnCount\[7\] 291.29 MHz 3.433 ns Internal " "Info: Clock \"clk\" has Internal fmax of 291.29 MHz between source register \"angleDnCount\[3\]\" and destination register \"angleDnCount\[7\]\" (period= 3.433 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.267 ns + Longest register register " "Info: + Longest register to register delay is 3.267 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns angleDnCount\[3\] 1 REG LC_X32_Y28_N3 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X32_Y28_N3; Fanout = 4; REG Node = 'angleDnCount\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "" { angleDnCount[3] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.535 ns) + CELL(0.366 ns) 0.901 ns rtl~66 2 COMB LC_X31_Y28_N2 1 " "Info: 2: + IC(0.535 ns) + CELL(0.366 ns) = 0.901 ns; Loc. = LC_X31_Y28_N2; Fanout = 1; COMB Node = 'rtl~66'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.901 ns" { angleDnCount[3] rtl~66 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.487 ns) + CELL(0.075 ns) 1.463 ns rtl~67 3 COMB LC_X32_Y28_N8 2 " "Info: 3: + IC(0.487 ns) + CELL(0.075 ns) = 1.463 ns; Loc. = LC_X32_Y28_N8; Fanout = 2; COMB Node = 'rtl~67'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.562 ns" { rtl~66 rtl~67 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.333 ns) + CELL(0.366 ns) 2.162 ns angleDnCount\[0\]~292 4 COMB LC_X32_Y28_N9 8 " "Info: 4: + IC(0.333 ns) + CELL(0.366 ns) = 2.162 ns; Loc. = LC_X32_Y28_N9; Fanout = 8; COMB Node = 'angleDnCount\[0\]~292'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.699 ns" { rtl~67 angleDnCount[0]~292 } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.344 ns) + CELL(0.761 ns) 3.267 ns angleDnCount\[7\] 5 REG LC_X32_Y28_N7 2 " "Info: 5: + IC(0.344 ns) + CELL(0.761 ns) = 3.267 ns; Loc. = LC_X32_Y28_N7; Fanout = 2; REG Node = 'angleDnCount\[7\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "1.105 ns" { angleDnCount[0]~292 angleDnCount[7] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.568 ns ( 48.00 % ) " "Info: Total cell delay = 1.568 ns ( 48.00 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.699 ns ( 52.00 % ) " "Info: Total interconnect delay = 1.699 ns ( 52.00 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "3.267 ns" { angleDnCount[3] rtl~66 rtl~67 angleDnCount[0]~292 angleDnCount[7] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.267 ns" { angleDnCount[3] rtl~66 rtl~67 angleDnCount[0]~292 angleDnCount[7] } { 0.000ns 0.535ns 0.487ns 0.333ns 0.344ns } { 0.000ns 0.366ns 0.075ns 0.366ns 0.761ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.806 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.806 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clk 1 CLK PIN_L2 11 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 11; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "" { clk } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.539 ns) + CELL(0.542 ns) 2.806 ns angleDnCount\[7\] 2 REG LC_X32_Y28_N7 2 " "Info: 2: + IC(1.539 ns) + CELL(0.542 ns) = 2.806 ns; Loc. = LC_X32_Y28_N7; Fanout = 2; REG Node = 'angleDnCount\[7\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.081 ns" { clk angleDnCount[7] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns ( 45.15 % ) " "Info: Total cell delay = 1.267 ns ( 45.15 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.539 ns ( 54.85 % ) " "Info: Total interconnect delay = 1.539 ns ( 54.85 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[7] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[7] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.806 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.806 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clk 1 CLK PIN_L2 11 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 11; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "" { clk } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.539 ns) + CELL(0.542 ns) 2.806 ns angleDnCount\[3\] 2 REG LC_X32_Y28_N3 4 " "Info: 2: + IC(1.539 ns) + CELL(0.542 ns) = 2.806 ns; Loc. = LC_X32_Y28_N3; Fanout = 4; REG Node = 'angleDnCount\[3\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.081 ns" { clk angleDnCount[3] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns ( 45.15 % ) " "Info: Total cell delay = 1.267 ns ( 45.15 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.539 ns ( 54.85 % ) " "Info: Total interconnect delay = 1.539 ns ( 54.85 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[3] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[7] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[7] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[3] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.156 ns + " "Info: + Micro clock to output delay of source is 0.156 ns" {  } { { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.010 ns + " "Info: + Micro setup delay of destination is 0.010 ns" {  } { { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "3.267 ns" { angleDnCount[3] rtl~66 rtl~67 angleDnCount[0]~292 angleDnCount[7] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "3.267 ns" { angleDnCount[3] rtl~66 rtl~67 angleDnCount[0]~292 angleDnCount[7] } { 0.000ns 0.535ns 0.487ns 0.333ns 0.344ns } { 0.000ns 0.366ns 0.075ns 0.366ns 0.761ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[7] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[7] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[3] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[3] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "angleDnCount\[5\] manner\[1\] clk 4.756 ns register " "Info: tsu for register \"angleDnCount\[5\]\" (data pin = \"manner\[1\]\", clock pin = \"clk\") is 4.756 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.552 ns + Longest pin register " "Info: + Longest pin to register delay is 7.552 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.234 ns) 1.234 ns manner\[1\] 1 PIN PIN_G4 4 " "Info: 1: + IC(0.000 ns) + CELL(1.234 ns) = 1.234 ns; Loc. = PIN_G4; Fanout = 4; PIN Node = 'manner\[1\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "" { manner[1] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.147 ns) + CELL(0.075 ns) 5.456 ns Mux~76 2 COMB LC_X33_Y28_N7 9 " "Info: 2: + IC(4.147 ns) + CELL(0.075 ns) = 5.456 ns; Loc. = LC_X33_Y28_N7; Fanout = 9; COMB Node = 'Mux~76'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "4.222 ns" { manner[1] Mux~76 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.769 ns) + CELL(0.451 ns) 6.676 ns angleDnCount\[0\]~284COUT1_294 3 COMB LC_X32_Y28_N0 2 " "Info: 3: + IC(0.769 ns) + CELL(0.451 ns) = 6.676 ns; Loc. = LC_X32_Y28_N0; Fanout = 2; COMB Node = 'angleDnCount\[0\]~284COUT1_294'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "1.220 ns" { Mux~76 angleDnCount[0]~284COUT1_294 } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 6.736 ns angleDnCount\[1\]~288COUT1_295 4 COMB LC_X32_Y28_N1 2 " "Info: 4: + IC(0.000 ns) + CELL(0.060 ns) = 6.736 ns; Loc. = LC_X32_Y28_N1; Fanout = 2; COMB Node = 'angleDnCount\[1\]~288COUT1_295'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.060 ns" { angleDnCount[0]~284COUT1_294 angleDnCount[1]~288COUT1_295 } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 6.796 ns angleDnCount\[2\]~260COUT1_296 5 COMB LC_X32_Y28_N2 2 " "Info: 5: + IC(0.000 ns) + CELL(0.060 ns) = 6.796 ns; Loc. = LC_X32_Y28_N2; Fanout = 2; COMB Node = 'angleDnCount\[2\]~260COUT1_296'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.060 ns" { angleDnCount[1]~288COUT1_295 angleDnCount[2]~260COUT1_296 } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 6.856 ns angleDnCount\[3\]~264COUT1 6 COMB LC_X32_Y28_N3 2 " "Info: 6: + IC(0.000 ns) + CELL(0.060 ns) = 6.856 ns; Loc. = LC_X32_Y28_N3; Fanout = 2; COMB Node = 'angleDnCount\[3\]~264COUT1'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.060 ns" { angleDnCount[2]~260COUT1_296 angleDnCount[3]~264COUT1 } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.118 ns) 6.974 ns angleDnCount\[4\]~268 7 COMB LC_X32_Y28_N4 3 " "Info: 7: + IC(0.000 ns) + CELL(0.118 ns) = 6.974 ns; Loc. = LC_X32_Y28_N4; Fanout = 3; COMB Node = 'angleDnCount\[4\]~268'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.118 ns" { angleDnCount[3]~264COUT1 angleDnCount[4]~268 } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.578 ns) 7.552 ns angleDnCount\[5\] 8 REG LC_X32_Y28_N5 4 " "Info: 8: + IC(0.000 ns) + CELL(0.578 ns) = 7.552 ns; Loc. = LC_X32_Y28_N5; Fanout = 4; REG Node = 'angleDnCount\[5\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "0.578 ns" { angleDnCount[4]~268 angleDnCount[5] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.636 ns ( 34.90 % ) " "Info: Total cell delay = 2.636 ns ( 34.90 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.916 ns ( 65.10 % ) " "Info: Total interconnect delay = 4.916 ns ( 65.10 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "7.552 ns" { manner[1] Mux~76 angleDnCount[0]~284COUT1_294 angleDnCount[1]~288COUT1_295 angleDnCount[2]~260COUT1_296 angleDnCount[3]~264COUT1 angleDnCount[4]~268 angleDnCount[5] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "7.552 ns" { manner[1] manner[1]~out0 Mux~76 angleDnCount[0]~284COUT1_294 angleDnCount[1]~288COUT1_295 angleDnCount[2]~260COUT1_296 angleDnCount[3]~264COUT1 angleDnCount[4]~268 angleDnCount[5] } { 0.000ns 0.000ns 4.147ns 0.769ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 1.234ns 0.075ns 0.451ns 0.060ns 0.060ns 0.060ns 0.118ns 0.578ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.010 ns + " "Info: + Micro setup delay of destination is 0.010 ns" {  } { { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.806 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.806 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clk 1 CLK PIN_L2 11 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 11; CLK Node = 'clk'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "" { clk } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.539 ns) + CELL(0.542 ns) 2.806 ns angleDnCount\[5\] 2 REG LC_X32_Y28_N5 4 " "Info: 2: + IC(1.539 ns) + CELL(0.542 ns) = 2.806 ns; Loc. = LC_X32_Y28_N5; Fanout = 4; REG Node = 'angleDnCount\[5\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.081 ns" { clk angleDnCount[5] } "NODE_NAME" } "" } } { "step_motor.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/step_motor/step_motor.vhd" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns ( 45.15 % ) " "Info: Total cell delay = 1.267 ns ( 45.15 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.539 ns ( 54.85 % ) " "Info: Total interconnect delay = 1.539 ns ( 54.85 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[5] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[5] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "7.552 ns" { manner[1] Mux~76 angleDnCount[0]~284COUT1_294 angleDnCount[1]~288COUT1_295 angleDnCount[2]~260COUT1_296 angleDnCount[3]~264COUT1 angleDnCount[4]~268 angleDnCount[5] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "7.552 ns" { manner[1] manner[1]~out0 Mux~76 angleDnCount[0]~284COUT1_294 angleDnCount[1]~288COUT1_295 angleDnCount[2]~260COUT1_296 angleDnCount[3]~264COUT1 angleDnCount[4]~268 angleDnCount[5] } { 0.000ns 0.000ns 4.147ns 0.769ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 1.234ns 0.075ns 0.451ns 0.060ns 0.060ns 0.060ns 0.118ns 0.578ns } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "step_motor" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/step_motor/db/step_motor.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/step_motor/" "" "2.806 ns" { clk angleDnCount[5] } "NODE_NAME" } "" } } { "d:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus51/bin/Technology_Viewer.qrui" "2.806 ns" { clk clk~out0 angleDnCount[5] } { 0.000ns 0.000ns 1.539ns } { 0.000ns 0.725ns 0.542ns } } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}