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📄 step_motor.vho

📁 本程序设计一个基于FPGA的4相步进电机定位控制系统。由步进电机方向设定电路模块、步进电机步进移动与定位控制模块和编码输出模块构成。前两个模块完成电机旋转方向设定
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-- GENERIC MAP (
--	operation_mode => "input",
--	ddio_mode => "none",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	ddiodatain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	delayctrlin => GND,
	modesel => \angle[3]~I_modesel\,
	combout => \angle[3]~combout\,
	padio => ww_angle(3));

\angle[2]~I\ : stratix_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	ddio_mode => "none",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	ddiodatain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	delayctrlin => GND,
	modesel => \angle[2]~I_modesel\,
	combout => \angle[2]~combout\,
	padio => ww_angle(2));

\angleDnCount[0]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[0]\ = DFFEAS(\Mux~76\ $ \angleDnCount[0]\, GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[0]~combout\, , \angleDnCount[0]~292\, !\ini~combout\)
-- \angleDnCount[0]~284\ = CARRY(\angleDnCount[0]\ # !\Mux~76\)
-- \angleDnCount[0]~284COUT1_294\ = CARRY(\angleDnCount[0]\ # !\Mux~76\)

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "datac",
--	lut_mask => "66DD",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[0]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => \Mux~76\,
	datab => \angleDnCount[0]\,
	datac => \angle[0]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => GND,
	cin0 => GND,
	cin1 => VCC,
	inverta => GND,
	regcascin => GND,
	modesel => \angleDnCount[0]~I_modesel\,
	regout => \angleDnCount[0]\,
	cout0 => \angleDnCount[0]~284\,
	cout1 => \angleDnCount[0]~284COUT1_294\);

\angleDnCount[1]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[1]\ = DFFEAS(\Mux~76\ $ \angleDnCount[1]\ $ \angleDnCount[0]~284\, GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[1]~combout\, , \angleDnCount[0]~292\, !\ini~combout\)
-- \angleDnCount[1]~288\ = CARRY(\Mux~76\ & !\angleDnCount[1]\ & !\angleDnCount[0]~284\ # !\Mux~76\ & (!\angleDnCount[0]~284\ # !\angleDnCount[1]\))
-- \angleDnCount[1]~288COUT1_295\ = CARRY(\Mux~76\ & !\angleDnCount[1]\ & !\angleDnCount[0]~284COUT1_294\ # !\Mux~76\ & (!\angleDnCount[0]~284COUT1_294\ # !\angleDnCount[1]\))

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "cin",
--	lut_mask => "9617",
--	cin0_used => "true",
--	cin1_used => "true",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[1]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => \Mux~76\,
	datab => \angleDnCount[1]\,
	datac => \angle[1]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => GND,
	cin0 => \angleDnCount[0]~284\,
	cin1 => \angleDnCount[0]~284COUT1_294\,
	inverta => GND,
	regcascin => GND,
	modesel => \angleDnCount[1]~I_modesel\,
	regout => \angleDnCount[1]\,
	cout0 => \angleDnCount[1]~288\,
	cout1 => \angleDnCount[1]~288COUT1_295\);

\angleDnCount[2]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[2]\ = DFFEAS(\angleDnCount[2]\ $ (\angleDnCount[1]~288\), GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[2]~combout\, , \angleDnCount[0]~292\, !\ini~combout\)
-- \angleDnCount[2]~260\ = CARRY(\angleDnCount[2]\ # !\angleDnCount[1]~288\)
-- \angleDnCount[2]~260COUT1_296\ = CARRY(\angleDnCount[2]\ # !\angleDnCount[1]~288COUT1_295\)

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "cin",
--	lut_mask => "5AAF",
--	cin0_used => "true",
--	cin1_used => "true",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[2]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => \angleDnCount[2]\,
	datab => VCC,
	datac => \angle[2]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => GND,
	cin0 => \angleDnCount[1]~288\,
	cin1 => \angleDnCount[1]~288COUT1_295\,
	inverta => GND,
	regcascin => GND,
	modesel => \angleDnCount[2]~I_modesel\,
	regout => \angleDnCount[2]\,
	cout0 => \angleDnCount[2]~260\,
	cout1 => \angleDnCount[2]~260COUT1_296\);

\angleDnCount[3]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[3]\ = DFFEAS(\angleDnCount[3]\ $ (!\angleDnCount[2]~260\), GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[3]~combout\, , \angleDnCount[0]~292\, !\ini~combout\)
-- \angleDnCount[3]~264\ = CARRY(!\angleDnCount[3]\ & (!\angleDnCount[2]~260\))
-- \angleDnCount[3]~264COUT1\ = CARRY(!\angleDnCount[3]\ & (!\angleDnCount[2]~260COUT1_296\))

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "cin",
--	lut_mask => "A505",
--	cin0_used => "true",
--	cin1_used => "true",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[3]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => \angleDnCount[3]\,
	datab => VCC,
	datac => \angle[3]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => GND,
	cin0 => \angleDnCount[2]~260\,
	cin1 => \angleDnCount[2]~260COUT1_296\,
	inverta => GND,
	regcascin => GND,
	modesel => \angleDnCount[3]~I_modesel\,
	regout => \angleDnCount[3]\,
	cout0 => \angleDnCount[3]~264\,
	cout1 => \angleDnCount[3]~264COUT1\);

\angleDnCount[4]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[4]\ = DFFEAS(\angleDnCount[4]\ $ (\angleDnCount[3]~264\), GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[4]~combout\, , \angleDnCount[0]~292\, !\ini~combout\)
-- \angleDnCount[4]~268\ = 

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "cin",
--	lut_mask => "5AAF",
--	cin0_used => "true",
--	cin1_used => "true",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[4]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => \angleDnCount[4]\,
	datab => VCC,
	datac => \angle[4]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => GND,
	cin0 => \angleDnCount[3]~264\,
	cin1 => \angleDnCount[3]~264COUT1\,
	inverta => GND,
	regcascin => GND,
	modesel => \angleDnCount[4]~I_modesel\,
	regout => \angleDnCount[4]\,
	cout => \angleDnCount[4]~268\);

\angle[5]~I\ : stratix_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	ddio_mode => "none",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	ddiodatain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	delayctrlin => GND,
	modesel => \angle[5]~I_modesel\,
	combout => \angle[5]~combout\,
	padio => ww_angle(5));

\angleDnCount[5]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[5]\ = DFFEAS(\angleDnCount[5]\ $ !(!\angleDnCount[4]~268\ & GND) # (\angleDnCount[4]~268\ & VCC), GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[5]~combout\, , \angleDnCount[0]~292\, !\ini~combout\)
-- \angleDnCount[5]~272\ = CARRY(!\angleDnCount[5]\ & !\angleDnCount[4]~268\)
-- \angleDnCount[5]~272COUT1_297\ = CARRY(!\angleDnCount[5]\ & !\angleDnCount[4]~268\)

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "cin",
--	lut_mask => "C303",
--	cin_used => "true",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[5]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => VCC,
	datab => \angleDnCount[5]\,
	datac => \angle[5]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => \angleDnCount[4]~268\,
	cin0 => GND,
	cin1 => VCC,
	inverta => GND,
	regcascin => GND,
	modesel => \angleDnCount[5]~I_modesel\,
	regout => \angleDnCount[5]\,
	cout0 => \angleDnCount[5]~272\,
	cout1 => \angleDnCount[5]~272COUT1_297\);

\angleDnCount[6]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[6]\ = DFFEAS(\angleDnCount[6]\ $ (!\angleDnCount[4]~268\ & \angleDnCount[5]~272\) # (\angleDnCount[4]~268\ & \angleDnCount[5]~272COUT1_297\), GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[6]~combout\, , \angleDnCount[0]~292\, 
-- !\ini~combout\)
-- \angleDnCount[6]~276\ = CARRY(\angleDnCount[6]\ # !\angleDnCount[5]~272\)
-- \angleDnCount[6]~276COUT1_298\ = CARRY(\angleDnCount[6]\ # !\angleDnCount[5]~272COUT1_297\)

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "arithmetic",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "cin",
--	lut_mask => "3CCF",
--	cin_used => "true",
--	cin0_used => "true",
--	cin1_used => "true",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[6]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => VCC,
	datab => \angleDnCount[6]\,
	datac => \angle[6]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => \angleDnCount[4]~268\,
	cin0 => \angleDnCount[5]~272\,
	cin1 => \angleDnCount[5]~272COUT1_297\,
	inverta => GND,
	regcascin => GND,
	modesel => \angleDnCount[6]~I_modesel\,
	regout => \angleDnCount[6]\,
	cout0 => \angleDnCount[6]~276\,
	cout1 => \angleDnCount[6]~276COUT1_298\);

\angle[7]~I\ : stratix_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	ddio_mode => "none",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	ddiodatain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	delayctrlin => GND,
	modesel => \angle[7]~I_modesel\,
	combout => \angle[7]~combout\,
	padio => ww_angle(7));

\angleDnCount[7]~I\ : stratix_lcell
-- Equation(s):
-- \angleDnCount[7]\ = DFFEAS(\angleDnCount[7]\ $ (!(!\angleDnCount[4]~268\ & \angleDnCount[6]~276\) # (\angleDnCount[4]~268\ & \angleDnCount[6]~276COUT1_298\)), GLOBAL(\clk~combout\), !GLOBAL(\reset~combout\), , , \angle[7]~combout\, , 
-- \angleDnCount[0]~292\, !\ini~combout\)

-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "normal",
--	synch_mode => "on",
--	register_cascade_mode => "off",
--	sum_lutc_input => "cin",
--	lut_mask => "A5A5",
--	cin_used => "true",
--	cin0_used => "true",
--	cin1_used => "true",
--	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	pathsel => \angleDnCount[7]~I_pathsel\,
	enable_asynch_arcs => lcell_ff_enable_asynch_arcs_out,
	clk => \clk~combout\,
	dataa => \angleDnCount[7]\,
	datab => VCC,
	datac => \angle[7]~combout\,
	datad => VCC,
	aclr => \reset~combout\,
	aload => GND,
	sclr => \angleDnCount[0]~292\,
	sload => \ALT_INV_ini~combout\,
	ena => VCC,
	cin => \angleDnCount[4]~268\,
	cin0 => \angleDnCount[6]~276\,
	cin1 => \angleDnCount[6]~276COUT1_298\,
	inverta => GND,
	regcascin => GND,
1234

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