📄 step_motor_vhd.sdo
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// Copyright (C) 1991-2005 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files any of the foregoing
// (including device programming or simulation files), and any
// associated documentation or information are expressly subject
// to the terms and conditions of the Altera Program License
// Subscription Agreement, Altera MegaCore Function License
// Agreement, or other applicable license agreement, including,
// without limitation, that your use is for the sole purpose of
// programming logic devices manufactured by Altera and sold by
// Altera or its authorized distributors. Please refer to the
// applicable agreement for further details.
//
// Device: Altera EP1S10F484C5 Package FBGA484
//
//
// This SDF file should be used for ModelSim (VHDL) only
//
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "step_motor")
(DATE "08/03/2008 11:13:11")
(VENDOR "Altera")
(PROGRAM "Quartus II")
(VERSION "Version 5.1 Build 176 10/26/2005 SJ Full Version")
(DIVIDER .)
(TIMESCALE 1 ps)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\clk\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (725:725:725) (725:725:725))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\dir\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\manner\[0\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\manner\[1\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1234:1234:1234) (1234:1234:1234))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\angle\[0\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\Mux\~77_I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (3945:3945:3945) (3923:3923:3923))
(PORT datab (4144:4144:4144) (4076:4076:4076))
(PORT datac (3728:3728:3728) (3698:3698:3698))
(IOPATH dataa combout (366:366:366) (366:366:366))
(IOPATH datab combout (280:280:280) (280:280:280))
(IOPATH datac combout (183:183:183) (183:183:183))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\reset\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (828:828:828) (828:828:828))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\ini\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\cntInc\[1\]\~5_I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datab (4144:4144:4144) (4075:4075:4075))
(PORT datac (3939:3939:3939) (3931:3931:3931))
(PORT datad (3736:3736:3736) (3686:3686:3686))
(IOPATH datab combout (280:280:280) (280:280:280))
(IOPATH datac combout (183:183:183) (183:183:183))
(IOPATH datad combout (75:75:75) (75:75:75))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\Mux\~76_I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (3939:3939:3939) (3931:3931:3931))
(PORT datad (4147:4147:4147) (4075:4075:4075))
(IOPATH datac combout (183:183:183) (183:183:183))
(IOPATH datad combout (75:75:75) (75:75:75))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\count\[0\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (341:341:341) (335:335:335))
(PORT datab (401:401:401) (398:398:398))
(PORT datac (343:343:343) (350:350:350))
(IOPATH dataa regin (539:539:539) (539:539:539))
(IOPATH datab regin (458:458:458) (458:458:458))
(IOPATH dataa cout0 (443:443:443) (443:443:443))
(IOPATH datab cout0 (344:344:344) (344:344:344))
(IOPATH dataa cout1 (451:451:451) (451:451:451))
(IOPATH datab cout1 (341:341:341) (341:341:341))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE \\count\[0\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT sload (4588:4588:4588) (4616:4616:4616))
(PORT datac (428:428:428) (435:435:435))
(PORT aclr (2192:2192:2192) (2167:2167:2167))
(PORT clk (2081:2081:2081) (2052:2052:2052))
(IOPATH (posedge clk) regout (156:156:156) (156:156:156))
(IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(SETUP sload (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
(HOLD sload (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\count\[1\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (343:343:343) (336:336:336))
(PORT datab (400:400:400) (397:397:397))
(PORT datac (343:343:343) (349:349:349))
(IOPATH dataa regin (539:539:539) (539:539:539))
(IOPATH datab regin (458:458:458) (458:458:458))
(IOPATH cin0 regin (489:489:489) (489:489:489))
(IOPATH cin1 regin (497:497:497) (497:497:497))
(IOPATH dataa cout0 (443:443:443) (443:443:443))
(IOPATH datab cout0 (344:344:344) (344:344:344))
(IOPATH cin0 cout0 (58:58:58) (58:58:58))
(IOPATH dataa cout1 (451:451:451) (451:451:451))
(IOPATH datab cout1 (341:341:341) (341:341:341))
(IOPATH cin1 cout1 (60:60:60) (60:60:60))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE \\count\[1\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT sload (4588:4588:4588) (4616:4616:4616))
(PORT datac (428:428:428) (434:434:434))
(PORT aclr (2192:2192:2192) (2167:2167:2167))
(PORT clk (2081:2081:2081) (2052:2052:2052))
(IOPATH (posedge clk) regout (156:156:156) (156:156:156))
(IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(SETUP sload (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
(HOLD sload (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\count\[2\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (3748:3748:3748) (3696:3696:3696))
(PORT datac (342:342:342) (348:348:348))
(PORT datad (418:418:418) (408:408:408))
(IOPATH dataa regin (539:539:539) (539:539:539))
(IOPATH datad regin (223:223:223) (223:223:223))
(IOPATH cin0 regin (489:489:489) (489:489:489))
(IOPATH cin1 regin (497:497:497) (497:497:497))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE \\count\[2\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT sload (4588:4588:4588) (4616:4616:4616))
(PORT datac (427:427:427) (433:433:433))
(PORT aclr (2192:2192:2192) (2167:2167:2167))
(PORT clk (2081:2081:2081) (2052:2052:2052))
(IOPATH (posedge clk) regout (156:156:156) (156:156:156))
(IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(SETUP sload (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
(HOLD sload (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\angle\[1\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\angle\[6\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (972:972:972) (972:972:972))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\angle\[4\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1234:1234:1234) (1234:1234:1234))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\angle\[3\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_io")
(INSTANCE \\angle\[2\]\~I\\.inst1)
(DELAY
(ABSOLUTE
(IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
)
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\angleDnCount\[0\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (769:769:769) (746:746:746))
(PORT datab (387:387:387) (388:388:388))
(PORT datac (3739:3739:3739) (3705:3705:3705))
(IOPATH dataa regin (539:539:539) (539:539:539))
(IOPATH datab regin (458:458:458) (458:458:458))
(IOPATH dataa cout0 (443:443:443) (443:443:443))
(IOPATH datab cout0 (344:344:344) (344:344:344))
(IOPATH dataa cout1 (451:451:451) (451:451:451))
(IOPATH datab cout1 (341:341:341) (341:341:341))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE \\angleDnCount\[0\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT sload (4581:4581:4581) (4603:4603:4603))
(PORT datac (3824:3824:3824) (3790:3790:3790))
(PORT sclr (1080:1080:1080) (1105:1105:1105))
(PORT aclr (2192:2192:2192) (2167:2167:2167))
(PORT clk (2081:2081:2081) (2052:2052:2052))
(IOPATH (posedge clk) regout (156:156:156) (156:156:156))
(IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(SETUP sclr (posedge clk) (10:10:10))
(SETUP sload (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
(HOLD sclr (posedge clk) (100:100:100))
(HOLD sload (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\angleDnCount\[1\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (768:768:768) (745:745:745))
(PORT datab (386:386:386) (387:387:387))
(PORT datac (3987:3987:3987) (3918:3918:3918))
(IOPATH dataa regin (539:539:539) (539:539:539))
(IOPATH datab regin (458:458:458) (458:458:458))
(IOPATH cin0 regin (489:489:489) (489:489:489))
(IOPATH cin1 regin (497:497:497) (497:497:497))
(IOPATH dataa cout0 (443:443:443) (443:443:443))
(IOPATH datab cout0 (344:344:344) (344:344:344))
(IOPATH cin0 cout0 (58:58:58) (58:58:58))
(IOPATH dataa cout1 (451:451:451) (451:451:451))
(IOPATH datab cout1 (341:341:341) (341:341:341))
(IOPATH cin1 cout1 (60:60:60) (60:60:60))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE \\angleDnCount\[1\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT sload (4581:4581:4581) (4603:4603:4603))
(PORT datac (4072:4072:4072) (4003:4003:4003))
(PORT sclr (1080:1080:1080) (1105:1105:1105))
(PORT aclr (2192:2192:2192) (2167:2167:2167))
(PORT clk (2081:2081:2081) (2052:2052:2052))
(IOPATH (posedge clk) regout (156:156:156) (156:156:156))
(IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
)
)
(TIMINGCHECK
(SETUP datac (posedge clk) (10:10:10))
(SETUP datain (posedge clk) (10:10:10))
(SETUP sclr (posedge clk) (10:10:10))
(SETUP sload (posedge clk) (10:10:10))
(HOLD datac (posedge clk) (100:100:100))
(HOLD datain (posedge clk) (100:100:100))
(HOLD sclr (posedge clk) (100:100:100))
(HOLD sload (posedge clk) (100:100:100))
)
)
(CELL
(CELLTYPE "stratix_asynch_lcell")
(INSTANCE \\angleDnCount\[2\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (405:405:405) (399:399:399))
(PORT datac (4612:4612:4612) (4598:4598:4598))
(IOPATH dataa regin (539:539:539) (539:539:539))
(IOPATH cin0 regin (489:489:489) (489:489:489))
(IOPATH cin1 regin (497:497:497) (497:497:497))
(IOPATH dataa cout0 (443:443:443) (443:443:443))
(IOPATH cin0 cout0 (58:58:58) (58:58:58))
(IOPATH dataa cout1 (451:451:451) (451:451:451))
(IOPATH cin1 cout1 (60:60:60) (60:60:60))
)
)
)
(CELL
(CELLTYPE "stratix_lcell_register")
(INSTANCE \\angleDnCount\[2\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT sload (4581:4581:4581) (4603:4603:4603))
(PORT datac (4697:4697:4697) (4683:4683:4683))
(PORT sclr (1080:1080:1080) (1105:1105:1105))
(PORT aclr (2192:2192:2192) (2167:2167:2167))
(PORT clk (2081:2081:2081) (2052:2052:2052))
(IOPATH (posedge clk) regout (156:156:156) (156:156:156))
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