frequency.fit.qmsg

这个程序是基于等精度测频原理的频率计

{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0 0 "Finished register packing" 0 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "21 unused 3.30 1 20 0 " "Info: Number of I/O pins in group: 21 (unused VREF, 3.30 VCCIO, 1 input, 20 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." {  } {  } 0 0 "I/O standards used: %1!s!" 0 0}  } {  } 0 0 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0}  } {  } 0 0 "Statistics of %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 0 29 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  29 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 30 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  30 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use unused 0 51 " "Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  51 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 1 51 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 1 total pin(s) used --  51 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5 does not use unused 2 27 " "Info: I/O bank number 5 does not use VREF pins and has unused VCCIO pins. 2 total pin(s) used --  27 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6 does not use unused 0 29 " "Info: I/O bank number 6 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  29 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7 does not use unused 0 52 " "Info: I/O bank number 7 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  52 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8 does not use unused 0 51 " "Info: I/O bank number 8 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  51 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "9 does not use unused 0 6 " "Info: I/O bank number 9 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  6 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "10 does not use unused 0 0 " "Info: I/O bank number 10 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  0 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "11 does not use unused 0 6 " "Info: I/O bank number 11 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  6 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "12 does not use unused 0 0 " "Info: I/O bank number 12 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  0 pins available" {  } {  } 0 0 "I/O bank number %1!d! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0}  } {  } 0 0 "Statistics of %1!s!" 0 0}  } {  } 0 0 "I/O bank details %1!s! I/O pin placement" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:01 " "Info: Fitter placement operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "5.820 ns register register " "Info: Estimated most critical path is register to register delay of 5.820 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns qq\[11\] 1 REG LAB_X41_Y16 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X41_Y16; Fanout = 2; REG Node = 'qq\[11\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "" { qq[11] } "NODE_NAME" } "" } } { "frequency.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/frequency/frequency.vhd" 59 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.332 ns) + CELL(0.344 ns) 1.676 ns LessThan~1616 2 COMB LAB_X45_Y14 1 " "Info: 2: + IC(1.332 ns) + CELL(0.344 ns) = 1.676 ns; Loc. = LAB_X45_Y14; Fanout = 1; COMB Node = 'LessThan~1616'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "1.676 ns" { qq[11] LessThan~1616 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.058 ns) 1.734 ns LessThan~1611 3 COMB LAB_X45_Y14 1 " "Info: 3: + IC(0.000 ns) + CELL(0.058 ns) = 1.734 ns; Loc. = LAB_X45_Y14; Fanout = 1; COMB Node = 'LessThan~1611'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.058 ns" { LessThan~1616 LessThan~1611 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.058 ns) 1.792 ns LessThan~1606 4 COMB LAB_X45_Y14 1 " "Info: 4: + IC(0.000 ns) + CELL(0.058 ns) = 1.792 ns; Loc. = LAB_X45_Y14; Fanout = 1; COMB Node = 'LessThan~1606'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.058 ns" { LessThan~1611 LessThan~1606 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.058 ns) 1.850 ns LessThan~1601 5 COMB LAB_X45_Y14 1 " "Info: 5: + IC(0.000 ns) + CELL(0.058 ns) = 1.850 ns; Loc. = LAB_X45_Y14; Fanout = 1; COMB Node = 'LessThan~1601'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.058 ns" { LessThan~1606 LessThan~1601 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.214 ns) 2.064 ns LessThan~1596 6 COMB LAB_X45_Y14 1 " "Info: 6: + IC(0.000 ns) + CELL(0.214 ns) = 2.064 ns; Loc. = LAB_X45_Y14; Fanout = 1; COMB Node = 'LessThan~1596'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.214 ns" { LessThan~1601 LessThan~1596 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.098 ns) 2.162 ns LessThan~1571 7 COMB LAB_X45_Y14 1 " "Info: 7: + IC(0.000 ns) + CELL(0.098 ns) = 2.162 ns; Loc. = LAB_X45_Y14; Fanout = 1; COMB Node = 'LessThan~1571'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.098 ns" { LessThan~1596 LessThan~1571 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.098 ns) 2.260 ns LessThan~1546 8 COMB LAB_X45_Y13 1 " "Info: 8: + IC(0.000 ns) + CELL(0.098 ns) = 2.260 ns; Loc. = LAB_X45_Y13; Fanout = 1; COMB Node = 'LessThan~1546'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.098 ns" { LessThan~1571 LessThan~1546 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.469 ns) 2.729 ns LessThan~1517 9 COMB LAB_X45_Y13 9 " "Info: 9: + IC(0.000 ns) + CELL(0.469 ns) = 2.729 ns; Loc. = LAB_X45_Y13; Fanout = 9; COMB Node = 'LessThan~1517'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.469 ns" { LessThan~1546 LessThan~1517 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.924 ns) + CELL(0.183 ns) 3.836 ns dian\[1\]~1278 10 COMB LAB_X45_Y11 1 " "Info: 10: + IC(0.924 ns) + CELL(0.183 ns) = 3.836 ns; Loc. = LAB_X45_Y11; Fanout = 1; COMB Node = 'dian\[1\]~1278'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "1.107 ns" { LessThan~1517 dian[1]~1278 } "NODE_NAME" } "" } } { "frequency.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/frequency/frequency.vhd" 59 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.977 ns) + CELL(0.366 ns) 5.179 ns dian\[1\]~1279 11 COMB LAB_X41_Y12 1 " "Info: 11: + IC(0.977 ns) + CELL(0.366 ns) = 5.179 ns; Loc. = LAB_X41_Y12; Fanout = 1; COMB Node = 'dian\[1\]~1279'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "1.343 ns" { dian[1]~1278 dian[1]~1279 } "NODE_NAME" } "" } } { "frequency.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/frequency/frequency.vhd" 59 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.102 ns) + CELL(0.539 ns) 5.820 ns dian\[1\]~reg0 12 REG LAB_X41_Y12 2 " "Info: 12: + IC(0.102 ns) + CELL(0.539 ns) = 5.820 ns; Loc. = LAB_X41_Y12; Fanout = 2; REG Node = 'dian\[1\]~reg0'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "0.641 ns" { dian[1]~1279 dian[1]~reg0 } "NODE_NAME" } "" } } { "frequency.vhd" "" { Text "E:/xuxing/学习资料/Altium翻译/my example/frequency/frequency.vhd" 59 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.485 ns ( 42.70 % ) " "Info: Total cell delay = 2.485 ns ( 42.70 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.335 ns ( 57.30 % ) " "Info: Total interconnect delay = 3.335 ns ( 57.30 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "frequency" "UNKNOWN" "V1" "E:/xuxing/学习资料/Altium翻译/my example/frequency/db/frequency.quartus_db" { Floorplan "E:/xuxing/学习资料/Altium翻译/my example/frequency/" "" "5.820 ns" { qq[11] LessThan~1616 LessThan~1611 LessThan~1606 LessThan~1601 LessThan~1596 LessThan~1571 LessThan~1546 LessThan~1517 dian[1]~1278 dian[1]~1279 dian[1]~reg0 } "NODE_NAME" } "" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 5 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 5%" {  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}