fpga_project2.hier_info

此RS232通信协议用VHDL语言实现

regout_0 => count_f_14_.ENA
regout_0 => count_f_15_.ENA
regout_0 => count_f_16_.ENA
regout_0 => count_f_17_.ENA
regout_0 => count_f_18_.ENA
regout_0 => count_f_19_.ENA
regout_0 => count_f_20_.ENA
regout_0 => count_f_21_.ENA
regout_0 => count_f_22_.ENA
regout_0 => count_f_23_.ENA
regout_0 => count_f_24_.ENA
regout_0 => count_f_25_.ENA
regout_0 => count_f_26_.ENA
regout_0 => count_f_27_.ENA
regout_0 => count_f_28_.ENA
regout_0 => count_f_29_.ENA
regout_0 => count_f_30_.ENA
regout_0 => count_f_31_.ENA
regout_0 => FRQCNT2_ENGINE_cell_currentstate_0_5__h_2:currentstate_h.regout_0
regout_3 => latchedcount_f_31_.DATAB
ClockOut => gc_ff1_Z.DATAD
FREQB_i => count_f_0_.CLK
FREQB_i => count_f_1_.CLK
FREQB_i => count_f_2_.CLK
FREQB_i => count_f_3_.CLK
FREQB_i => count_f_4_.CLK
FREQB_i => count_f_5_.CLK
FREQB_i => count_f_6_.CLK
FREQB_i => count_f_7_.CLK
FREQB_i => count_f_8_.CLK
FREQB_i => count_f_9_.CLK
FREQB_i => count_f_10_.CLK
FREQB_i => count_f_11_.CLK
FREQB_i => count_f_12_.CLK
FREQB_i => count_f_13_.CLK
FREQB_i => count_f_14_.CLK
FREQB_i => count_f_15_.CLK
FREQB_i => count_f_16_.CLK
FREQB_i => count_f_17_.CLK
FREQB_i => count_f_18_.CLK
FREQB_i => count_f_19_.CLK
FREQB_i => count_f_20_.CLK
FREQB_i => count_f_21_.CLK
FREQB_i => count_f_22_.CLK
FREQB_i => count_f_23_.CLK
FREQB_i => count_f_24_.CLK
FREQB_i => count_f_25_.CLK
FREQB_i => count_f_26_.CLK
FREQB_i => count_f_27_.CLK
FREQB_i => count_f_28_.CLK
FREQB_i => count_f_29_.CLK
FREQB_i => count_f_30_.CLK
FREQB_i => count_f_31_.CLK
FREQB => count_r_0_.CLK
FREQB => count_r_1_.CLK
FREQB => count_r_2_.CLK
FREQB => count_r_3_.CLK
FREQB => count_r_4_.CLK
FREQB => count_r_5_.CLK
FREQB => count_r_6_.CLK
FREQB => count_r_7_.CLK
FREQB => count_r_8_.CLK
FREQB => count_r_9_.CLK
FREQB => count_r_10_.CLK
FREQB => count_r_11_.CLK
FREQB => count_r_12_.CLK
FREQB => count_r_13_.CLK
FREQB => count_r_14_.CLK
FREQB => count_r_15_.CLK
FREQB => count_r_16_.CLK
FREQB => count_r_17_.CLK
FREQB => count_r_18_.CLK
FREQB => count_r_19_.CLK
FREQB => count_r_20_.CLK
FREQB => count_r_21_.CLK
FREQB => count_r_22_.CLK
FREQB => count_r_23_.CLK
FREQB => count_r_24_.CLK
FREQB => count_r_25_.CLK
FREQB => count_r_26_.CLK
FREQB => count_r_27_.CLK
FREQB => count_r_28_.CLK
FREQB => count_r_29_.CLK
FREQB => count_r_30_.CLK
FREQB => count_r_31_.CLK
G_577_a <= latchedcount_r_30_.COMBOUT
G_576_a <= latchedcount_r_29_.COMBOUT
G_575_a <= latchedcount_r_28_.COMBOUT
G_574_a <= latchedcount_r_27_.COMBOUT
G_573_a <= latchedcount_r_26_.COMBOUT
G_572_a <= latchedcount_r_25_.COMBOUT
G_571_a <= latchedcount_r_24_.COMBOUT
G_570_a <= latchedcount_r_23_.COMBOUT
G_569_a <= latchedcount_r_22_.COMBOUT
G_568_a <= latchedcount_r_21_.COMBOUT
G_567_a <= latchedcount_r_20_.COMBOUT
G_566_a <= latchedcount_r_19_.COMBOUT
G_565_a <= latchedcount_r_18_.COMBOUT
G_564_a <= latchedcount_r_17_.COMBOUT
G_563_a <= latchedcount_r_16_.COMBOUT
G_562_a <= latchedcount_r_15_.COMBOUT
G_561_a <= latchedcount_r_14_.COMBOUT
G_560_a <= latchedcount_r_13_.COMBOUT
G_559_a <= latchedcount_r_12_.COMBOUT
G_558_a <= latchedcount_r_11_.COMBOUT
G_557_a <= latchedcount_r_10_.COMBOUT
G_556_a <= latchedcount_r_9_.COMBOUT
G_555_a <= latchedcount_r_8_.COMBOUT
G_554_a <= latchedcount_r_7_.COMBOUT
G_553_a <= latchedcount_r_6_.COMBOUT
G_552_a <= latchedcount_r_5_.COMBOUT
G_551_a <= latchedcount_r_4_.COMBOUT
G_550_a <= latchedcount_r_3_.COMBOUT
G_549_a <= latchedcount_r_2_.COMBOUT
G_548_a <= latchedcount_r_1_.COMBOUT
shiftdr => latchedcount_r_0_.DATAA
shiftdr => latchedcount_r_1_.DATAA
shiftdr => latchedcount_r_2_.DATAA
shiftdr => latchedcount_r_3_.DATAA
shiftdr => latchedcount_r_4_.DATAA
shiftdr => latchedcount_r_5_.DATAA
shiftdr => latchedcount_r_6_.DATAA
shiftdr => latchedcount_r_7_.DATAA
shiftdr => latchedcount_r_8_.DATAA
shiftdr => latchedcount_r_9_.DATAA
shiftdr => latchedcount_r_10_.DATAA
shiftdr => latchedcount_r_11_.DATAA
shiftdr => latchedcount_r_12_.DATAA
shiftdr => latchedcount_r_13_.DATAA
shiftdr => latchedcount_r_14_.DATAA
shiftdr => latchedcount_r_15_.DATAA
shiftdr => latchedcount_r_16_.DATAA
shiftdr => latchedcount_r_17_.DATAA
shiftdr => latchedcount_r_18_.DATAA
shiftdr => latchedcount_r_19_.DATAA
shiftdr => latchedcount_r_20_.DATAA
shiftdr => latchedcount_r_21_.DATAA
shiftdr => latchedcount_r_22_.DATAA
shiftdr => latchedcount_r_23_.DATAA
shiftdr => latchedcount_r_24_.DATAA
shiftdr => latchedcount_r_25_.DATAA
shiftdr => latchedcount_r_26_.DATAA
shiftdr => latchedcount_r_27_.DATAA
shiftdr => latchedcount_r_28_.DATAA
shiftdr => latchedcount_r_29_.DATAA
shiftdr => latchedcount_r_30_.DATAA
G_547_a <= latchedcount_r_0_.COMBOUT
TIMEBASE => latchedcount_f_31_.CLK
TIMEBASE => latchedcount_r_0_.CLK
TIMEBASE => latchedcount_r_1_.CLK
TIMEBASE => latchedcount_r_2_.CLK
TIMEBASE => latchedcount_r_3_.CLK
TIMEBASE => latchedcount_r_4_.CLK
TIMEBASE => latchedcount_r_5_.CLK
TIMEBASE => latchedcount_r_6_.CLK
TIMEBASE => latchedcount_r_7_.CLK
TIMEBASE => latchedcount_r_8_.CLK
TIMEBASE => latchedcount_r_9_.CLK
TIMEBASE => latchedcount_r_10_.CLK
TIMEBASE => latchedcount_r_11_.CLK
TIMEBASE => latchedcount_r_12_.CLK
TIMEBASE => latchedcount_r_13_.CLK
TIMEBASE => latchedcount_r_14_.CLK
TIMEBASE => latchedcount_r_15_.CLK
TIMEBASE => latchedcount_r_16_.CLK
TIMEBASE => latchedcount_r_17_.CLK
TIMEBASE => latchedcount_r_18_.CLK
TIMEBASE => latchedcount_r_19_.CLK
TIMEBASE => latchedcount_r_20_.CLK
TIMEBASE => latchedcount_r_21_.CLK
TIMEBASE => latchedcount_r_22_.CLK
TIMEBASE => latchedcount_r_23_.CLK
TIMEBASE => latchedcount_r_24_.CLK
TIMEBASE => latchedcount_r_25_.CLK
TIMEBASE => latchedcount_r_26_.CLK
TIMEBASE => latchedcount_r_27_.CLK
TIMEBASE => latchedcount_r_28_.CLK
TIMEBASE => latchedcount_r_29_.CLK
TIMEBASE => latchedcount_r_30_.CLK
TIMEBASE => latchedcount_r_31_.CLK
TIMEBASE => latchedcount_f_30_.CLK
TIMEBASE => latchedcount_f_29_.CLK
TIMEBASE => latchedcount_f_28_.CLK
TIMEBASE => latchedcount_f_27_.CLK
TIMEBASE => latchedcount_f_26_.CLK
TIMEBASE => latchedcount_f_25_.CLK
TIMEBASE => latchedcount_f_24_.CLK
TIMEBASE => latchedcount_f_23_.CLK
TIMEBASE => latchedcount_f_22_.CLK
TIMEBASE => latchedcount_f_21_.CLK
TIMEBASE => latchedcount_f_20_.CLK
TIMEBASE => latchedcount_f_19_.CLK
TIMEBASE => latchedcount_f_18_.CLK
TIMEBASE => latchedcount_f_17_.CLK
TIMEBASE => latchedcount_f_16_.CLK
TIMEBASE => latchedcount_f_15_.CLK
TIMEBASE => latchedcount_f_14_.CLK
TIMEBASE => latchedcount_f_13_.CLK
TIMEBASE => latchedcount_f_12_.CLK
TIMEBASE => latchedcount_f_11_.CLK
TIMEBASE => latchedcount_f_10_.CLK
TIMEBASE => latchedcount_f_9_.CLK
TIMEBASE => latchedcount_f_8_.CLK
TIMEBASE => latchedcount_f_7_.CLK
TIMEBASE => latchedcount_f_6_.CLK
TIMEBASE => latchedcount_f_5_.CLK
TIMEBASE => latchedcount_f_4_.CLK
TIMEBASE => latchedcount_f_3_.CLK
TIMEBASE => latchedcount_f_2_.CLK
TIMEBASE => latchedcount_f_1_.CLK
TIMEBASE => latchedcount_f_0_.CLK
TIMEBASE => gateenable_Z.CLK
TIMEBASE => gc_ff2_Z.CLK
TIMEBASE => gc_ff1_Z.CLK
TIMEBASE => FRQCNT2_ENGINE_cell_currentstate_0_5__h_2:currentstate_h.TIMEBASE
G_578_a <= latchedcount_f_31_.COMBOUT


|FPGA_Project2|FRQCNT2:U2|FRQCNT2_TOP:M_FC|FRQCNT2_ENGINE_1:FR2|FRQCNT2_ENGINE_cell_currentstate_0_5__h_2:currentstate_h
regout_0 => currentstate_0_.ACLR
regout_0 => currentstate_1_.ACLR
regout_0 => currentstate_2_.ACLR
regout_0 => currentstate_3_.ACLR
regout_0 => currentstate_4_.ACLR
regout_0 => currentstate_i_0_5_.ACLR
currentstate_4 <= currentstate_4_.REGOUT
currentstate_3 <= currentstate_3_.REGOUT
currentstate_0 <= currentstate_0_.REGOUT
gateenable => currentstate_1_.DATAA
gateenable => currentstate_2_.DATAC
gateenable => currentstate_3_.DATAA
gateenable => currentstate_4_.DATAA
gateenable => currentstate_i_0_5_.DATAB
TIMEBASE => currentstate_0_.CLK
TIMEBASE => currentstate_1_.CLK
TIMEBASE => currentstate_2_.CLK
TIMEBASE => currentstate_3_.CLK
TIMEBASE => currentstate_4_.CLK
TIMEBASE => currentstate_i_0_5_.CLK


|FPGA_Project2|FRQCNT2:U2|FRQCNT2_TOP:M_FC|FRQCNT2_DATAREG_INOUT_WRZ1:control_register
irout_0 => shift_proc_un2_enable_0_and6.DATAB
irout_0 => update_proc_un3_update_0_and6.DATAB
irout_1 => shift_proc_un2_enable_0_and6.DATAA
irout_1 => update_proc_un3_update_0_and6.DATAA
regout_0 <= regout_0_.REGOUT
regout_1 <= regout_1_.REGOUT
regout_2 <= regout_2_.REGOUT
regout_7 <= regout_7_.REGOUT
sh_reg_0 <= sh_reg_0_.REGOUT
un16_tms_0_and2 => update_proc_un3_update_0_and6.DATAD
un20_tapstate_r_0_and2 => shift_proc_un2_enable_0_and6.DATAD
un1_ins_0_and2_2 => shift_proc_un2_enable_0_and6.DATAC
un1_ins_0_and2_2 => update_proc_un3_update_0_and6.DATAC
shiftdr => sh_reg_7_.DATAB
shiftdr => sh_reg_6_.SCLR
shiftdr => sh_reg_5_.SCLR
shiftdr => sh_reg_4_.SCLR
shiftdr => sh_reg_3_.SCLR
shiftdr => sh_reg_2_.SCLR
shiftdr => sh_reg_1_.SCLR
shiftdr => sh_reg_0_.SCLR
TDI => sh_reg_7_.DATAA
TCK => sh_reg_7_.CLK
TCK => sh_reg_6_.CLK
TCK => sh_reg_5_.CLK
TCK => sh_reg_4_.CLK
TCK => sh_reg_3_.CLK
TCK => sh_reg_2_.CLK
TCK => sh_reg_1_.CLK
TCK => sh_reg_0_.CLK
TCK => regout_7_.CLK
TCK => regout_2_.CLK
TCK => regout_1_.CLK
TCK => regout_0_.CLK


|FPGA_Project2|FRQCNT2:U2|FRQCNT2_TOP:M_FC|FRQCNT2_DATAREG_INOUT_WRZ0:user1_register
regout_0_7 => update_proc_un8_update_0_and6.DATAA
regout_0_0 => shift_proc_un9_enable_0_and6.DATAA
regout_0_0 => update_proc_un8_update_0_and6.DATAB
regout_0_3 <= regout_3_.REGOUT
regout_0 <= regout_0_.REGOUT
regout_1 <= regout_1_.REGOUT
regout_2 <= regout_2_.REGOUT
regout_4 <= regout_4_.REGOUT
regout_5 <= regout_5_.REGOUT
regout_6 <= regout_6_.REGOUT
regout_7 <= regout_7_.REGOUT
regout_8 <= regout_8_.REGOUT
regout_9 <= regout_9_.REGOUT
regout_10 <= regout_10_.REGOUT
regout_11 <= regout_11_.REGOUT
regout_12 <= regout_12_.REGOUT
regout_13 <= regout_13_.REGOUT
regout_14 <= regout_14_.REGOUT
regout_15 <= regout_15_.REGOUT
regout_16 <= regout_16_.REGOUT
regout_17 <= regout_17_.REGOUT
regout_18 <= regout_18_.REGOUT
regout_19 <= regout_19_.REGOUT
regout_20 <= regout_20_.REGOUT
regout_21 <= regout_21_.REGOUT
regout_22 <= regout_22_.REGOUT
regout_23 <= regout_23_.REGOUT
regout_24 <= regout_24_.REGOUT
regout_25 <= regout_25_.REGOUT
regout_26 <= regout_26_.REGOUT
regout_27 <= regout_27_.REGOUT
regout_28 <= regout_28_.REGOUT
regout_29 <= regout_29_.REGOUT
regout_30 <= regout_30_.REGOUT
regout_31 <= regout_31_.REGOUT
regout_3 => sh_reg_30_.DATAD
regout_3 => sh_reg_29_.DATAD
regout_3 => sh_reg_28_.DATAD
regout_3 => sh_reg_27_.DATAD
regout_3 => sh_reg_26_.DATAD
regout_3 => sh_reg_25_.DATAD
regout_3 => sh_reg_24_.DATAD
regout_3 => sh_reg_23_.DATAD
regout_3 => sh_reg_22_.DATAD
regout_3 => sh_reg_21_.DATAD
regout_3 => sh_reg_20_.DATAD
regout_3 => sh_reg_19_.DATAD
regout_3 => sh_reg_18_.DATAD
regout_3 => sh_reg_17_.DATAD
regout_3 => sh_reg_16_.DATAD
regout_3 => sh_reg_15_.DATAD
regout_3 => sh_reg_14_.DATAD
regout_3 => sh_reg_13_.DATAD
regout_3 => sh_reg_12_.DATAD
regout_3 => sh_reg_11_.DATAD
regout_3 => sh_reg_10_.DATAD
regout_3 => sh_reg_9_.DATAD
regout_3 => sh_reg_8_.DATAD
regout_3 => sh_reg_7_.DATAD
regout_3 => sh_reg_6_.DATAD
regout_3 => sh_reg_5_.DATAD
regout_3 => sh_reg_4_.DATAD
regout_3 => sh_reg_3_.DATAD
regout_3 => sh_reg_2_.DATAD
regout_3 => sh_reg_1_.DATAD
regout_3 => sh_reg_0_.DATAD
latchedcount_f_0 => sh_reg_0_.DATAC
latchedcount_f_1 => sh_reg_1_.DATAC
latchedcount_f_2 => sh_reg_2_.DATAC
latchedcount_f_3 => sh_reg_3_.DATAC
latchedcount_f_4 => sh_reg_4_.DATAC
latchedcount_f_5 => sh_reg_5_.DATAC
latchedcount_f_6 => sh_reg_6_.DATAC
latchedcount_f_7 => sh_reg_7_.DATAC
latchedcount_f_8 => sh_reg_8_.DATAC
latchedcount_f_9 => sh_reg_9_.DATAC
latchedcount_f_10 => sh_reg_10_.DATAC
latchedcount_f_11 => sh_reg_11_.DATAC
latchedcount_f_12 => sh_reg_12_.DATAC
latchedcount_f_13 => sh_reg_13_.DATAC
latchedcount_f_14 => sh_reg_14_.DATAC
latchedcount_f_15 => sh_reg_15_.DATAC
latchedcount_f_16 => sh_reg_16_.DATAC
latchedcount_f_17 => sh_reg_17_.DATAC
latchedcount_f_18 => sh_reg_18_.DATAC
latchedcount_f_19 => sh_reg_19_.DATAC
latchedcount_f_20 => sh_reg_20_.DATAC
latchedcount_f_21 => sh_reg_21_.DATAC
latchedcount_f_22 => sh_reg_22_.DATAC
latchedcount_f_23 => sh_reg_23_.DATAC
latchedcount_f_24 => sh_reg_24_.DATAC
latchedcount_f_25 => sh_reg_25_.DATAC
latchedcount_f_26 => sh_reg_26_.DATAC
latchedcount_f_27 => sh_reg_27_.DATAC
latchedcount_f_28 => sh_reg_28_.DATAC
latchedcount_f_29 => sh_reg_29_.DATAC
latchedcount_f_30 => sh_reg_30_.DATAC
sh_reg_0 <= sh_reg_0_.REGOUT
sh_reg_1 <= sh_reg_1_.REGOUT
sh_reg_2 <= sh_reg_2_.REGOUT
sh_reg_3 <= sh_reg_3_.REGOUT
sh_reg_4 <= sh_reg_4_.REGOUT
sh_reg_5 <= sh_reg_5_.REGOUT
sh_reg_6 <= sh_reg_6_.REGOUT
sh_reg_7 <= sh_reg_7_.REGOUT
sh_reg_8 <= sh_reg_8_.REGOUT
sh_reg_9 <= sh_reg_9_.REGOUT
sh_reg_10 <= sh_reg_10_.REGOUT
sh_reg_11 <= sh_reg_11_.REGOUT
sh_reg_12 <= sh_reg_12_.REGOUT
sh_reg_13 <= sh_reg_13_.REGOUT
sh_reg_14 <= sh_reg_14_.REGOUT
sh_reg_15 <= sh_reg_15_.REGOUT
sh_reg_16 <= sh_reg_16_.REGOUT
sh_reg_17 <= sh_reg_17_.REGOUT
sh_reg_18 <= sh_reg_18_.REGOUT
sh_reg_19 <= sh_reg_19_.REGOUT
sh_reg_20 <= sh_reg_20_.REGOUT
sh_reg_21 <= sh_reg_21_.REGOUT
sh_reg_22 <= sh_reg_22_.REGOUT
sh_reg_23 <= sh_reg_23_.REGOUT
sh_reg_24 <= sh_reg_24_.REGOUT
sh_reg_25 <= sh_reg_25_.REGOUT
sh_reg_26 <= sh_reg_26_.REGOUT
sh_reg_27 <= sh_reg_27_.REGOUT
sh_reg_28 <= sh_reg_28_.REGOUT
sh_reg_29 <= sh_reg_29_.REGOUT
sh_reg_30 <= sh_reg_30_.REGOUT
sh_reg_31 <= sh_reg_31_.REGOUT
un16_tms_0_and2 => update_proc_un8_update_0_and6.DATAC
un20_tapstate_r_0_and2 => shift_proc_un9_enable_0_and6.DATAC
un11_ins_0_and2 => shift_proc_un9_enable_0_and6.DATAB