uart.tan.summary

来自「在ＶＨＤＬ上编写了UART通信协议」· SUMMARY 代码 · 共 77 行

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 4.889 ns
From           : cs
To             : txdcnt[3]
From Clock     : --
To Clock       : clk1
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 8.594 ns
From           : sst[2]
To             : ti
From Clock     : clk1
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 7.638 ns
From           : rd
To             : data[2]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.144 ns
From           : wr
To             : sst[1]
From Clock     : --
To Clock       : clk1
Failed Paths   : 0

Type           : Clock Setup: 'clk16'
Slack          : N/A
Required Time  : None
Actual Time    : 230.79 MHz ( period = 4.333 ns )
From           : r_shift[2]
To             : rbuf[2]
From Clock     : clk16
To Clock       : clk16
Failed Paths   : 0

Type           : Clock Setup: 'clk1'
Slack          : N/A
Required Time  : None
Actual Time    : 343.52 MHz ( period = 2.911 ns )
From           : ssr[1]
To             : ssr[1]
From Clock     : clk1
To Clock       : clk1
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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