uart.qsf

在ＶＨＤＬ上编写了UART通信协议

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		UART_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY Stratix
set_global_assignment -name DEVICE AUTO
set_global_assignment -name TOP_LEVEL_ENTITY UART
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:19:39  MAY 26, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 7.2
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name VECTOR_INPUT_SOURCE "C:\\mywork\\04058095\\UART\\UART_RIGHT.VWF"
set_global_assignment -name INCREMENTAL_COMPILATION FULL_INCREMENTAL_COMPILATION
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE POST_SYNTH -section_id Top
set_global_assignment -name VECTOR_WAVEFORM_FILE UART.sim.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE UARTr.sim.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE UARTmr.sim.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE UARTdata.sim.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE UARTsend.sim.vwf
set_global_assignment -name SOURCE_FILE address_data.sim
set_global_assignment -name VECTOR_WAVEFORM_FILE address_data.sim.vwf
set_global_assignment -name SOURCE_FILE address_address_close.sim
set_global_assignment -name VECTOR_WAVEFORM_FILE address_address_close.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE wrong_addr.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE total.vwf
set_global_assignment -name SOURCE_FILE total.sim
set_global_assignment -name VECTOR_WAVEFORM_FILE total.sim.vwf
set_global_assignment -name SOURCE_FILE final.sim
set_global_assignment -name VECTOR_WAVEFORM_FILE final.vwf
set_global_assignment -name SOURCE_FILE last.sim
set_global_assignment -name VECTOR_WAVEFORM_FILE last.sim.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE fugai.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE UART_RIGHT.VWF
set_global_assignment -name VECTOR_WAVEFORM_FILE UART_WRONG.VWF
set_global_assignment -name VECTOR_WAVEFORM_FILE UART_WRONG.SIM.VWF
set_global_assignment -name VECTOR_WAVEFORM_FILE UART_RIGHT.SIM.VWF