counter.twr

学习Xilinx公司开发软件ISE的基础资料

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Release 6.2i Trace G.28
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

C:/eda/Xilinx/bin/nt/trce.exe -intstyle ise -e 3 -l 3 -xml counter counter.ncd
-o counter.twr counter.pcf


Design file:              counter.ncd
Physical constraint file: counter.pcf
Device,speed:             xcv50e,-6 (PRODUCTION 1.69 2003-12-13)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
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INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Clock Clk<0> to Pad
------------+------------+------------------+--------+
            | clk (edge) |                  |  Clock |
Destination | to PAD     |Internal Clock(s) |  Phase |
------------+------------+------------------+--------+
CntOut<0>   |    7.551(R)|Clk               |   0.000|
CntOut<1>   |    8.115(R)|Clk               |   0.000|
CntOut<2>   |    7.551(R)|Clk               |   0.000|
CntOut<3>   |    7.551(R)|Clk               |   0.000|
------------+------------+------------------+--------+

Clock to Setup on destination clock Clk<0>
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
Clk<0>         |    3.769|         |         |         |
---------------+---------+---------+---------+---------+

Analysis completed Tue Oct 12 22:26:33 2004
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Peak Memory Usage: 43 MB