rgy.vhd

--author: Suntion Tang --date: 2008-6-7 -- two warning --modify: By Suntion Tang at 2008-6-14 -

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--author:  Suntion Tang  
--date:    2008-6-7
--modify:  By suntion Tang
-- description  outy :  linght colour==> red yellow green left --+-- red yellow green left 
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY RGB IS
        PORT ( CIN: IN STD_LOGIC_VECTOR(6 DOWNTO 0);  
               CLK ,RST: IN STD_LOGIC;
               outy  : OUT STD_LOGIC_VECTOR(7 downto 0)  );
END RGB; 
ARCHITECTURE BEHAV OF RGB IS

    SIGNAL CURRENT_STATE, NEXT_STATE: STD_LOGIC_VECTOR(7 DOWNTO 0) ;
    CONSTANT ST0 : STD_LOGIC_VECTOR(7 DOWNTO 0) := "00101000";
    CONSTANT ST1 : STD_LOGIC_VECTOR(7 DOWNTO 0) := "01001000";
    CONSTANT ST2 : STD_LOGIC_VECTOR(7 DOWNTO 0) := "00010100";
    CONSTANT ST3 : STD_LOGIC_VECTOR(7 DOWNTO 0) := "00010001";
    CONSTANT ST4 : STD_LOGIC_VECTOR(7 DOWNTO 0) := "01000001";
    CONSTANT ST5 : STD_LOGIC_VECTOR(7 DOWNTO 0) := "10000100";
    CONSTANT ST6 : STD_LOGIC_VECTOR(7 DOWNTO 0) := "10000010";

BEGIN
    outy(7 downto 0) <= CURRENT_STATE(7 downto 0);
 COM: PROCESS(CURRENT_STATE,CIN)  
     BEGIN  --规定各状态转换方式

     CASE CURRENT_STATE IS                       
       WHEN ST0 => IF(CIN="0100111")  THEN NEXT_STATE <= ST1; ELSE NEXT_STATE<=ST0; END IF; --39
       WHEN ST1 => IF(CIN="0101100")  THEN NEXT_STATE <= ST2; ELSE NEXT_STATE<=ST1; END IF; --44
       WHEN ST2 => IF(CIN="0110001")  THEN NEXT_STATE <= ST3; ELSE NEXT_STATE<=ST2; END IF; --49 
       WHEN ST3 => IF(CIN="0111011")  THEN NEXT_STATE <= ST4; ELSE NEXT_STATE<=ST3; END IF; --59
       WHEN ST4 => IF(CIN="1000000")  THEN NEXT_STATE <= ST5; ELSE NEXT_STATE<=ST4; END IF; --64
       WHEN ST5 => IF(CIN="1000101")  THEN NEXT_STATE <= ST6; ELSE NEXT_STATE<=ST5; END IF; --69
       WHEN ST6 => IF(CIN="1101101")  THEN NEXT_STATE <= ST0; ELSE NEXT_STATE<=ST6; END IF; --109
       WHEN OTHERS => NEXT_STATE <= ST0;
     END CASE ; 
  END PROCESS COM ;
REG: PROCESS (CLK,RST)  
     BEGIN
     IF RST = '1' THEN   CURRENT_STATE<=ST0;
     ELSIF ( CLK'EVENT AND CLK='1')  THEN    
        CURRENT_STATE <= NEXT_STATE; --	在时钟上升沿，转换至下一状态
          END IF; 
   END PROCESS;  --	由信号 CURRENT_STATE 将当前状态值带出此进程，进入进程 PRO 
     END BEHAV;