txxclock.fit.summary

来自「VHDL编写的数字钟」· SUMMARY 代码 · 共 12 行

Fitter Status : Successful - Sun Jun 01 17:18:23 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : txxclock
Top-level Entity Name : txxclock
Family : ACEX1K
Device : EP1K30TC144-3
Timing Models : Final
Total logic elements : 111 / 1,728 ( 6 % )
Total pins : 30 / 102 ( 29 % )
Total memory bits : 0 / 24,576 ( 0 % )
Total PLLs : 0