deb_i2c.fit.rpt

I2C总线的verilog 程序

; Auto Delay Chains                              ; On                             ; On                             ;
; Auto Merge PLLs                                ; On                             ; On                             ;
; Ignore PLL Mode When Merging PLLs              ; Off                            ; Off                            ;
; Fitter Effort                                  ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                ; Normal                         ; Normal                         ;
; Auto Global Clock                              ; On                             ; On                             ;
; Auto Global Register Control Signals           ; On                             ; On                             ;
; Always Enable Input Buffers                    ; Off                            ; Off                            ;
+------------------------------------------------+--------------------------------+--------------------------------+


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in D:/altera_6/works/ep2c8/I2C/deb_i2c.pin.


+-------------------------------------------------------------------+
; Fitter Resource Usage Summary                                     ;
+---------------------------------------------+---------------------+
; Resource                                    ; Usage               ;
+---------------------------------------------+---------------------+
; Total logic elements                        ; 287 / 8,256 ( 3 % ) ;
;     -- Combinational with no register       ; 134                 ;
;     -- Register only                        ; 8                   ;
;     -- Combinational with a register        ; 145                 ;
;                                             ;                     ;
; Logic element usage by number of LUT inputs ;                     ;
;     -- 4 input functions                    ; 159                 ;
;     -- 3 input functions                    ; 35                  ;
;     -- <=2 input functions                  ; 85                  ;
;     -- Register only                        ; 8                   ;
;                                             ;                     ;
; Logic elements by mode                      ;                     ;
;     -- normal mode                          ; 228                 ;
;     -- arithmetic mode                      ; 51                  ;
;                                             ;                     ;
; Total registers                             ; 153 / 8,256 ( 2 % ) ;
; Total LABs                                  ; 20 / 516 ( 4 % )    ;
; User inserted logic elements                ; 0                   ;
; Virtual pins                                ; 0                   ;
; I/O pins                                    ; 6 / 138 ( 4 % )     ;
;     -- Clock pins                           ; 1 / 4 ( 25 % )      ;
; Global signals                              ; 2                   ;
; M4Ks                                        ; 0 / 36 ( 0 % )      ;
; Total memory bits                           ; 0 / 165,888 ( 0 % ) ;
; Total RAM block bits                        ; 0 / 165,888 ( 0 % ) ;
; Embedded Multiplier 9-bit elements          ; 0 / 36 ( 0 % )      ;
; PLLs                                        ; 0 / 2 ( 0 % )       ;
; Global clocks                               ; 2 / 8 ( 25 % )      ;
; Maximum fan-out node                        ; pld_CLEAR_n         ;
; Maximum fan-out                             ; 130                 ;
; Highest non-global fan-out signal           ; pld_CLEAR_n         ;
; Highest non-global fan-out                  ; 130                 ;
; Total fan-out                               ; 1413                ;
; Average fan-out                             ; 3.16                ;
+---------------------------------------------+---------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Input Pins                                                                                                                                                                                                                                                        ;
+-------------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; Name        ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Power Up High ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Location assigned by ;
+-------------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; clk1        ; 23    ; 1        ; 0            ; 9            ; 0           ; 1                     ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; LVTTL        ; Off         ; User                 ;
; pld_CLEAR_n ; 3     ; 1        ; 0            ; 18           ; 2           ; 130                   ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; LVTTL        ; Off         ; User                 ;
+-------------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Pins                                                                                                                                                                                                                                                                            ;
+-------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+------+
; Name  ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Output Register ; Output Enable Register ; Power Up High ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Location assigned by ; Load ;
+-------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+------+
; HC_CP ; 164   ; 2        ; 30           ; 19           ; 1           ; no              ; no                     ; no            ; no              ; no         ; no            ; no       ; Off          ; LVTTL        ; 24mA             ; Off         ; User                 ; 0 pF ;
; HC_SI ; 165   ; 2        ; 30           ; 19           ; 2           ; no              ; no                     ; no            ; no              ; no         ; no            ; no       ; Off          ; LVTTL        ; 24mA             ; Off         ; User                 ; 0 pF ;
+-------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Bidir Pins                                                                                                                                                                                                                                                                                                                                      ;
+---------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------------+------------+----------+--------------+--------------+------------------+-------------+----------------------+------+
; Name    ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Output Register ; Output Enable Register ; Power Up High ; PCI I/O Enabled ; Open Drain ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Location assigned by ; Load ;
+---------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------------+------------+----------+--------------+--------------+------------------+-------------+----------------------+------+
; I2C_clk ; 197   ; 2        ; 5            ; 19           ; 0           ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; no              ; no         ; no       ; Off          ; LVTTL        ; 24mA             ; Off         ; User                 ; 0 pF ;
; I2C_sda ; 195   ; 2        ; 9            ; 19           ; 2           ; 8                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; no              ; no         ; no       ; Off          ; LVTTL        ; 24mA             ; Off         ; User                 ; 0 pF ;
+---------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------------+------------+----------+--------------+--------------+------------------+-------------+----------------------+------+


+-----------------------------------------------------------+
; I/O Bank Usage                                            ;
+----------+-----------------+---------------+--------------+
; I/O Bank ; Usage           ; VCCIO Voltage ; VREF Voltage ;
+----------+-----------------+---------------+--------------+
; 1        ; 4 / 32 ( 13 % ) ; 3.3V          ; --           ;
; 2        ; 4 / 35 ( 11 % ) ; 3.3V          ; --           ;
; 3        ; 1 / 35 ( 3 % )  ; 3.3V          ; --           ;
; 4        ; 0 / 36 ( 0 % )  ; 3.3V          ; --           ;
+----------+-----------------+---------------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; All Package Pins                                                                                                                                                        ;
+----------+------------+----------+-------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+