📄 main.lss
字号:
2fe: 88 0f add r24, r24
300: 99 1f adc r25, r25
302: 0a 94 dec r0
304: e2 f7 brpl .-8 ; 0x2fe
306: 86 23 and r24, r22
308: 97 23 and r25, r23
30a: 89 2b or r24, r25
30c: 59 f3 breq .-42 ; 0x2e4
30e: 30 93 4d 01 sts 0x014D, r19
312: 20 93 4c 01 sts 0x014C, r18
316: 80 91 4c 01 lds r24, 0x014C
31a: 0e 94 cc 00 call 0x198
31e: 80 2f mov r24, r16
320: 0e 94 71 07 call 0xee2
324: 81 e0 ldi r24, 0x01 ; 1
326: e8 16 cp r14, r24
328: f1 04 cpc r15, r1
32a: 89 f0 breq .+34 ; 0x34e
32c: 82 e0 ldi r24, 0x02 ; 2
32e: e8 16 cp r14, r24
330: f1 04 cpc r15, r1
332: 24 f4 brge .+8 ; 0x33c
334: e1 14 cp r14, r1
336: f1 04 cpc r15, r1
338: 31 f0 breq .+12 ; 0x346
33a: 11 c0 rjmp .+34 ; 0x35e
33c: 82 e0 ldi r24, 0x02 ; 2
33e: e8 16 cp r14, r24
340: f1 04 cpc r15, r1
342: 49 f0 breq .+18 ; 0x356
344: 0c c0 rjmp .+24 ; 0x35e
346: ce 01 movw r24, r28
348: 0e 94 5e 0c call 0x18bc
34c: 09 c0 rjmp .+18 ; 0x360
34e: ce 01 movw r24, r28
350: 0e 94 85 11 call 0x230a
354: 05 c0 rjmp .+10 ; 0x360
356: ce 01 movw r24, r28
358: 0e 94 fa 10 call 0x21f4
35c: 01 c0 rjmp .+2 ; 0x360
35e: 80 e0 ldi r24, 0x00 ; 0
360: 08 2f mov r16, r24
362: 11 27 eor r17, r17
364: 0e 94 73 07 call 0xee6
368: 68 2f mov r22, r24
36a: 00 23 and r16, r16
36c: c9 f4 brne .+50 ; 0x3a0
36e: 41 e0 ldi r20, 0x01 ; 1
370: 50 e0 ldi r21, 0x00 ; 0
372: 02 c0 rjmp .+4 ; 0x378
374: 44 0f add r20, r20
376: 55 1f adc r21, r21
378: ea 94 dec r14
37a: e2 f7 brpl .-8 ; 0x374
37c: 20 91 50 01 lds r18, 0x0150
380: 30 91 51 01 lds r19, 0x0151
384: c9 01 movw r24, r18
386: 84 23 and r24, r20
388: 95 23 and r25, r21
38a: 89 2b or r24, r25
38c: 49 f0 breq .+18 ; 0x3a0
38e: ca 01 movw r24, r20
390: 80 95 com r24
392: 90 95 com r25
394: 28 23 and r18, r24
396: 39 23 and r19, r25
398: 30 93 51 01 sts 0x0151, r19
39c: 20 93 50 01 sts 0x0150, r18
3a0: 86 2f mov r24, r22
3a2: 0e 94 71 07 call 0xee2
3a6: ff 91 pop r31
3a8: ef 91 pop r30
3aa: df 91 pop r29
3ac: cf 91 pop r28
3ae: bf 91 pop r27
3b0: af 91 pop r26
3b2: 9f 91 pop r25
3b4: 8f 91 pop r24
3b6: 7f 91 pop r23
3b8: 6f 91 pop r22
3ba: 5f 91 pop r21
3bc: 4f 91 pop r20
3be: 3f 91 pop r19
3c0: 2f 91 pop r18
3c2: 1f 91 pop r17
3c4: 0f 91 pop r16
3c6: ff 90 pop r15
3c8: ef 90 pop r14
3ca: 0f 90 pop r0
3cc: 0f be out 0x3f, r0 ; 63
3ce: 0f 90 pop r0
3d0: 1f 90 pop r1
3d2: 18 95 reti
000003d4 <CC1000ControlGetLOStatus>:
bool CC1000ControlGetLOStatus(void) // 得到CC1000的LO状态
{
return CC1000ControlM_gCurrentParameters[0x1e];
3d4: 80 91 d9 02 lds r24, 0x02D9
}
3d8: 99 27 eor r25, r25
3da: 08 95 ret
000003dc <CC1000ControlComputeFreq>:
result_t CC1000ControlSelectLock(uint8_t Value) // 设置CC1000的PLL
{
CC1000ControlM_gCurrentParameters[0xd] = Value << 4;
return CC1000HPLWrite(0x0D, Value << 4);
}
result_t CC1000ControlChipconCal(void)
{
CC1000HPLWrite(0x0B, 0x00);
CC1000HPLWrite(0x42, 0x3f);
CC1000HPLWrite(0x00, (
1 << 4) | (1 << 0));
CC1000HPLWrite(0x0E, ((
1 << 7) | (
1 << 5)) | (6 << 0));
while ((CC1000HPLRead(0x0E) & (1 << 3)) == 0) ;
CC1000HPLWrite(0x0E, (
1 << 5) | (6 << 0));
CC1000HPLWrite(0x00, (((
1 << 7) | (1 << 6)) | (1 << 5)) | (
1 << 0));
CC1000HPLWrite(0x09, CC1000ControlM_gCurrentParameters[29]);
CC1000HPLWrite(0x0B, 0x00);
CC1000HPLWrite(0x0E, ((
1 << 7) | (
1 << 5)) | (6 << 0));
while ((CC1000HPLRead(0x0E) & (1 << 3)) == 0) ;
CC1000HPLWrite(0x0E, (
1 << 5) | (6 << 0));
return SUCCESS;
}
void CC1000ControlCC1000SetFreq(void)
{
uint8_t i;
for (i = 1; i < 0x0d; i++) {
CC1000HPLWrite(i, CC1000ControlM_gCurrentParameters[i]);
}
CC1000HPLWrite(0x12, CC1000ControlM_gCurrentParameters[0x12]);
CC1000ControlChipconCal();
return;
}
uint32_t CC1000ControlComputeFreq(uint32_t desiredFreq)
{
3dc: 2f 92 push r2
3de: 3f 92 push r3
3e0: 4f 92 push r4
3e2: 5f 92 push r5
3e4: 6f 92 push r6
3e6: 7f 92 push r7
3e8: 8f 92 push r8
3ea: 9f 92 push r9
3ec: af 92 push r10
3ee: bf 92 push r11
3f0: cf 92 push r12
3f2: df 92 push r13
3f4: ef 92 push r14
3f6: ff 92 push r15
3f8: 0f 93 push r16
3fa: 1f 93 push r17
3fc: cf 93 push r28
3fe: df 93 push r29
400: cd b7 in r28, 0x3d ; 61
402: de b7 in r29, 0x3e ; 62
404: 6e 97 sbiw r28, 0x1e ; 30
406: 0f b6 in r0, 0x3f ; 63
408: f8 94 cli
40a: de bf out 0x3e, r29 ; 62
40c: 0f be out 0x3f, r0 ; 63
40e: cd bf out 0x3d, r28 ; 61
410: 69 83 std Y+1, r22 ; 0x01
412: 7a 83 std Y+2, r23 ; 0x02
414: 8b 83 std Y+3, r24 ; 0x03
416: 9c 83 std Y+4, r25 ; 0x04
uint32_t ActualChannel = 0;
418: 1d 82 std Y+5, r1 ; 0x05
41a: 1e 82 std Y+6, r1 ; 0x06
41c: 1f 82 std Y+7, r1 ; 0x07
41e: 18 86 std Y+8, r1 ; 0x08
uint32_t RXFreq = 0;
420: 20 e0 ldi r18, 0x00 ; 0
422: 30 e0 ldi r19, 0x00 ; 0
424: 40 e0 ldi r20, 0x00 ; 0
426: 50 e0 ldi r21, 0x00 ; 0
428: 29 87 std Y+9, r18 ; 0x09
42a: 3a 87 std Y+10, r19 ; 0x0a
42c: 4b 87 std Y+11, r20 ; 0x0b
42e: 5c 87 std Y+12, r21 ; 0x0c
uint32_t TXFreq = 0;
430: 2d 87 std Y+13, r18 ; 0x0d
432: 3e 87 std Y+14, r19 ; 0x0e
434: 4f 87 std Y+15, r20 ; 0x0f
436: 58 8b std Y+16, r21 ; 0x10
int32_t Offset = 0x7fffffff;
438: 2f ef ldi r18, 0xFF ; 255
43a: 3f ef ldi r19, 0xFF ; 255
43c: 4f ef ldi r20, 0xFF ; 255
43e: 5f e7 ldi r21, 0x7F ; 127
440: 29 8b std Y+17, r18 ; 0x11
442: 3a 8b std Y+18, r19 ; 0x12
444: 4b 8b std Y+19, r20 ; 0x13
446: 5c 8b std Y+20, r21 ; 0x14
uint16_t FSep = 0;
448: 1d 8e std Y+29, r1 ; 0x1d
44a: 1e 8e std Y+30, r1 ; 0x1e
uint8_t RefDiv = 0;
44c: 1d 8a std Y+21, r1 ; 0x15
uint8_t i;
for (i = 0; i < 9; i++) {
44e: 3d 89 ldd r19, Y+21 ; 0x15
450: 3e 8b std Y+22, r19 ; 0x16
452: 44 e2 ldi r20, 0x24 ; 36
454: 51 e0 ldi r21, 0x01 ; 1
456: 4f 8b std Y+23, r20 ; 0x17
458: 58 8f std Y+24, r21 ; 0x18
45a: 82 e1 ldi r24, 0x12 ; 18
45c: 91 e0 ldi r25, 0x01 ; 1
45e: 89 8f std Y+25, r24 ; 0x19
460: 9a 8f std Y+26, r25 ; 0x1a
462: a0 e0 ldi r26, 0x00 ; 0
464: b0 e0 ldi r27, 0x00 ; 0
466: ab 8f std Y+27, r26 ; 0x1b
468: bc 8f std Y+28, r27 ; 0x1c
uint32_t NRef = desiredFreq + CC1000ControlM_IF;
46a: 29 81 ldd r18, Y+1 ; 0x01
46c: 3a 81 ldd r19, Y+2 ; 0x02
46e: 4b 81 ldd r20, Y+3 ; 0x03
470: 5c 81 ldd r21, Y+4 ; 0x04
472: 20 51 subi r18, 0x10 ; 16
474: 36 4b sbci r19, 0xB6 ; 182
476: 4d 4f sbci r20, 0xFD ; 253
478: 5f 4f sbci r21, 0xFF ; 255
uint32_t FRef = CC1000ControlM_FRefTbl[i];
47a: ef 89 ldd r30, Y+23 ; 0x17
47c: f8 8d ldd r31, Y+24 ; 0x18
47e: a1 90 ld r10, Z+
480: b1 90 ld r11, Z+
482: c1 90 ld r12, Z+
484: d1 90 ld r13, Z+
486: ef 8b std Y+23, r30 ; 0x17
488: f8 8f std Y+24, r31 ; 0x18
uint32_t Channel = 0;
48a: ee 24 eor r14, r14
48c: ff 24 eor r15, r15
48e: 87 01 movw r16, r14
uint32_t RXCalc = 0;
490: 17 01 movw r2, r14
492: 28 01 movw r4, r16
uint32_t TXCalc = 0;
int32_t diff;
NRef = ((desiredFreq + CC1000ControlM_IF) << 2) / FRef;
494: 72 e0 ldi r23, 0x02 ; 2
496: 22 0f add r18, r18
498: 33 1f adc r19, r19
49a: 44 1f adc r20, r20
49c: 55 1f adc r21, r21
49e: 7a 95 dec r23
4a0: d1 f7 brne .-12 ; 0x496
4a2: ca 01 movw r24, r20
4a4: b9 01 movw r22, r18
4a6: a6 01 movw r20, r12
4a8: 95 01 movw r18, r10
4aa: 0e 94 2c 19 call 0x3258
if (NRef & 0x1) {
4ae: da 01 movw r26, r20
4b0: c9 01 movw r24, r18
4b2: 81 70 andi r24, 0x01 ; 1
4b4: 90 70 andi r25, 0x00 ; 0
4b6: a0 70 andi r26, 0x00 ; 0
4b8: b0 70 andi r27, 0x00 ; 0
4ba: 89 2b or r24, r25
4bc: 21 f0 breq .+8 ; 0x4c6
NRef++;
4be: 2f 5f subi r18, 0xFF ; 255
4c0: 3f 4f sbci r19, 0xFF ; 255
4c2: 4f 4f sbci r20, 0xFF ; 255
4c4: 5f 4f sbci r21, 0xFF ; 255
}
if (NRef & 0x2) {
4c6: da 01 movw r26, r20
4c8: c9 01 movw r24, r18
4ca: b6 95 lsr r27
4cc: a7 95 ror r26
4ce: 97 95 ror r25
4d0: 87 95 ror r24
4d2: 81 70 andi r24, 0x01 ; 1
4d4: 90 70 andi r25, 0x00 ; 0
4d6: 89 2b or r24, r25
4d8: 59 f0 breq .+22 ; 0x4f0
RXCalc = 16384 >> 1;
4da: 21 2c mov r2, r1
4dc: f0 e2 ldi r31, 0x20 ; 32
4de: 3f 2e mov r3, r31
4e0: 41 2c mov r4, r1
4e2: 51 2c mov r5, r1
Channel = FRef >> 1;
4e4: 86 01 movw r16, r12
4e6: 75 01 movw r14, r10
4e8: 16 95 lsr r17
4ea: 07 95 ror r16
4ec: f7 94 ror r15
4ee: e7 94 ror r14
}
NRef >>= 2;
4f0: 72 e0 ldi r23, 0x02 ; 2
4f2: 56 95 lsr r21
4f4: 47 95 ror r20
4f6: 37 95 ror r19
4f8: 27 95 ror r18
4fa: 7a 95 dec r23
4fc: d1 f7 brne .-12 ; 0x4f2
RXCalc += NRef * 16384 - 8192;
4fe: da 01 movw r26, r20
500: c9 01 movw r24, r18
502: 6e e0 ldi r22, 0x0E ; 14
504: 88 0f add r24, r24
506: 99 1f adc r25, r25
508: aa 1f adc r26, r26
50a: bb 1f adc r27, r27
50c: 6a 95 dec r22
50e: d1 f7 brne .-12 ; 0x504
510: 82 0d add r24, r2
512: 93 1d adc r25, r3
514: a4 1d adc r26, r4
516: b5 1d adc r27, r5
518: 21 2c mov r2, r1
51a: f0 ee ldi r31, 0xE0 ; 224
51c: 3f 2e mov r3, r31
51e: ff ef ldi r31, 0xFF ; 255
520: 4f 2e mov r4, r31
522: ff ef ldi r31, 0xFF ; 255
524: 5f 2e mov r5, r31
526: 28 0e add r2, r24
528: 39 1e adc r3, r25
52a: 4a 1e adc r4, r26
52c: 5b 1e adc r5, r27
if (RXCalc < CC1000ControlM_FREQ_MIN || RXCalc > CC1000ControlM_FREQ_MAX) {
52e: 80 50 subi r24, 0x00 ; 0
530: 90 42 sbci r25, 0x20 ; 32
532: a0 44 sbci r26, 0x40 ; 64
534: b0 40 sbci r27, 0x00 ; 0
536: 80 50 subi r24, 0x00 ; 0
538: 9c 49 sbci r25, 0x9C ; 156
53a: af 4b sbci r26, 0xBF ; 191
53c: b0 40 sbci r27, 0x00 ; 0
53e: 08 f0 brcs .+2 ; 0x542
540: 64 c0 rjmp .+200 ; 0x60a
continue;
}
TXCalc = RXCalc - CC1000ControlM_CorTbl[i];
542: a9 8d ldd r26, Y+25 ; 0x19
544: ba 8d ldd r27, Y+26 ; 0x1a
546: 8d 91 ld r24, X+
548: 9c 91 ld r25, X
54a: aa 27 eor r26, r26
54c: bb 27 eor r27, r27
54e: 42 01 movw r8, r4
550: 31 01 movw r6, r2
552: 68 1a sub r6, r24
554: 79 0a sbc r7, r25
556: 8a 0a sbc r8, r26
558: 9b 0a sbc r9, r27
if (TXCalc < CC1000ControlM_FREQ_MIN || TXCalc > CC1000ControlM_FREQ_MAX) {
55a: d4 01 movw r26, r8
55c: c3 01 movw r24, r6
55e: 80 50 subi r24, 0x00 ; 0
560: 90 40 sbci r25, 0x00 ; 0
562: a0 44 sbci r26, 0x40 ; 64
564: b0 40 sbci r27, 0x00 ; 0
566: 80 50 subi r24, 0x00 ; 0
568: 9c 49 sbci r25, 0x9C ; 156
56a: af 4b sbci r26, 0xBF ; 191
56c: b0 40 sbci r27, 0x00 ; 0
56e: 08 f0 brcs .+2 ; 0x572
570: 4c c0 rjmp .+152 ; 0x60a
continue;
}
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