current.pdf

xilinx 开发板程序

[project]
name=ledreg
netlist=ledreg
contents=ledreg
date=10/30/00
time=13:32:58
version=3.1.5.00.34e
generics=MAX
Type=F21i
top_level=schematic
library_net=ON
sim_mode=FUNC
directory=C:\FNDTN\ACTIVE\PROJECTS\LEDREG
lib_order=1001 133 155
pdf_dir=c:\fndtn\active\projects\

[libraries]
1001=
133=c:\fndtn\active\syslib\simprims
155=c:\fndtn\active\syslib\xc4000x

[xilinx]
libraries=unified
family=2
xact9=On
xfam=XC4000XL

[device]
xilinx=4005XLPC84-3
part=4005XLPC84-3

[sheets]
LEDREG=
LEDREG2=

[Schematic]
Table01=Project
Table02=Sheet
Table03=Date
Table04=Date Last Modified

[Log]
exp_EDIF.log=Export netlist to EDIF 200

[ext_sheets]

[netlist]
external=FALSE

[implement_HDL]
family=2
xfam=XC4000XL
part=4005XLPC84-3
xilinx=4005XLPC84-3

[APP_95]
lid=0
oid=0
source=C:\FNDTN\ACTIVE\PROJECTS\LEDREG\LEDREG2.SCH

[sc_desk]
desk00=C:\FNDTN\ACTIVE\PROJECTS\LEDREG\LEDREG.SCH, 0, 0, 602, 333, 1
desk01=C:\FNDTN\ACTIVE\PROJECTS\LEDREG\LEDREG2.SCH, 22, 22, 617, 303, 0

[FILE7]
scan_time=973452174

[OPEN32]
nMaxFile=261
lpstrFile=c:\fndtn\active\projects\ledreg\ledreg.ucf
lpstrFilter=User Constraints (*.UCF)|*.ucf||
lpstrTitle=Select file
nFilterIndex=0
Flags=530436
cmdLine=-h 2504 -hp 2464 -m PCM_OPEN_32_MESSAGE -f C:\FNDTN\ACTIVE\PROJECTS\current.pdf

[implement_XIE]
version=ver1
revision=rev1