dds.qsf

在quartus软件下用VHDL语言实现DDS

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		dds_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "08:26:41  APRIL 03, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VHDL_FILE cos_rom/cos_rom.vhd
set_global_assignment -name VHDL_FILE juxing_rom/juxing_rom.vhd
set_global_assignment -name VHDL_FILE juchi_rom/juchi_rom.vhd
set_global_assignment -name VHDL_FILE sanjiao_rom/sanjiao_rom.vhd
set_global_assignment -name VHDL_FILE sine_rom/sine_rom.vhd
set_global_assignment -name VHDL_FILE fpq.vhd
set_global_assignment -name BDF_FILE fp.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE fp.vwf
set_global_assignment -name BDF_FILE dds.bdf
set_global_assignment -name BDF_FILE xiaochan.bdf
set_global_assignment -name VHDL_FILE counter.vhd
set_global_assignment -name VHDL_FILE jeilia.vhd
set_global_assignment -name VHDL_FILE phase_add.vhd
set_global_assignment -name VHDL_FILE choose.vhd
set_global_assignment -name BDF_FILE cef.bdf
set_global_assignment -name VHDL_FILE m10.vhd
set_global_assignment -name VHDL_FILE lock.vhd
set_global_assignment -name VHDL_FILE mux8_1.vhd
set_global_assignment -name BDF_FILE xianshi.bdf
set_global_assignment -name VHDL_FILE m8.vhd
set_global_assignment -name VHDL_FILE mux4_1.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE dds.vwf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_153 -to clk
set_location_assignment PIN_169 -to a
set_location_assignment PIN_170 -to b
set_location_assignment PIN_167 -to c
set_location_assignment PIN_168 -to d
set_location_assignment PIN_165 -to e
set_location_assignment PIN_166 -to f
set_location_assignment PIN_163 -to g
set_location_assignment PIN_160 -to dig0
set_location_assignment PIN_159 -to dig1
set_location_assignment PIN_162 -to dig2
set_location_assignment PIN_161 -to dig3
set_location_assignment PIN_136 -to dig4
set_location_assignment PIN_137 -to dig5
set_location_assignment PIN_138 -to dig6
set_location_assignment PIN_139 -to dig7
set_location_assignment PIN_121 -to reset
set_location_assignment PIN_122 -to leijia
set_location_assignment PIN_123 -to phone
set_location_assignment PIN_124 -to en
set_location_assignment PIN_143 -to addr0
set_location_assignment PIN_141 -to addr1
set_location_assignment PIN_8 -to DA1_mode
set_location_assignment PIN_38 -to DA_clk
set_location_assignment PIN_6 -to DA2_mode
set_location_assignment PIN_45 -to DA1[0]
set_location_assignment PIN_43 -to DA1[1]
set_location_assignment PIN_41 -to DA1[2]
set_location_assignment PIN_23 -to DA1[3]
set_location_assignment PIN_20 -to DA1[4]
set_location_assignment PIN_18 -to DA1[5]
set_location_assignment PIN_16 -to DA1[6]
set_location_assignment PIN_14 -to DA1[7]
set_location_assignment PIN_13 -to DA1[8]
set_location_assignment PIN_46 -to DA1[9]
set_location_assignment PIN_3 -to DA2[0]
set_location_assignment PIN_1 -to DA2[1]
set_location_assignment PIN_239 -to DA2[2]
set_location_assignment PIN_15 -to DA2[3]
set_location_assignment PIN_17 -to DA2[4]
set_location_assignment PIN_19 -to DA2[5]
set_location_assignment PIN_21 -to DA2[6]
set_location_assignment PIN_39 -to DA2[7]
set_location_assignment PIN_42 -to DA2[8]
set_location_assignment PIN_44 -to DA2[9]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY dds

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C12Q240C8
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"

# Simulator Assignments
# =====================
set_global_assignment -name VECTOR_INPUT_SOURCE dds.vwf