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<a href="#" onmousedown="showPopup(this, 'popup00418');"><img src="seealsolink.png" border="0" alt="" title=""></a> SystemVerilog 3.1a语言参考手册</div>
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19.8.1 Virtual interfaces and clocking blocks</div>
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Clocking blocks and interfaces can be combined to represent the interconnect between synchronous blocks. Moreover, because clocking blocks provide a procedural mechanism to assign values to both nets and variables, they are ideally suited to be used by virtual interfaces. For example: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00856"><pre class="Element12">interface SyncBus( input bit clk );
wire a, b, c;
clocking sb @(posedge clk);
input a;
output b;
inout c;
endclocking
endinterface
typedef virtual SyncBus VI; // A virtual interface type
task do_it( VI v ); // handles any SyncBus via clocking sb
if( v.sb.a == 1 )
v.sb.b <= 0;
else
v.sb.c <= ##1 1;
endtask</pre></div></div>
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In the preceding example, interface SyncBus includes a clocking block, which is used by task do_it to ensure synchronous access to the interface’s signals: a, b, and c. Note that changes to the storage type of the interface signals (from net to variable and vice-versa) requires no changes to the task. The interfaces can be instantiated as shown below. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00857"><pre class="Element12">module top;
bit clk;
SyncBus b1( clk );
SyncBus b2( clk );
initial begin
VI v[2] = { b1, b2 };
repeat( 20 )
do_it( v[ $urandom_range( 0, 1 ) ] );
end
endmodule</pre></div></div>
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The top module above shows how a virtual interface can be used to randomly select among a set of interfaces to be manipulated, in this case by the do_it task.</p></div>
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