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<a href="#" onmousedown="showPopup(this, 'popup00528');"><img src="seealsolink.png" border="0" alt="" title=""></a> SystemVerilog 3.1a语言参考手册</div>
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第二十九章 SystemVerilog覆盖API</div>
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描述 </div></td></tr><tr>
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<a href="00343.html" target="topic">29.1 需求</a> </div></td><td class="Element206" valign="top" width="50%">
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This chapter defines the Coverage Application Programming Interface (API) in SystemVerilog. </div></td></tr><tr>
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<a href="00347.html" target="topic">29.2 SystemVerilog real-time coverage access</a> </div></td><td class="Element206" valign="top" width="50%">
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This section describes the mechanisms in SystemVerilog through which SystemVerilog code can query and control coverage information. Coverage information is provided to SystemVerilog by means of a number of built-in system functions (described in Section 29.2.2) using a number of predefined constants (described in Section 29.2.1) to describe the types of coverage and the control actions to be performed. </div></td></tr><tr>
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<a href="00355.html" target="topic">29.3 FSM recognition</a> </div></td><td class="Element206" valign="top" width="50%">
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Coverage tools need to have automatic recognition of many of the common FSM coding idioms in Verilog/ SystemVerilog. This standard does not attempt to describe or require any specific automatic FSM recognition mechanisms. However, the standard does prescribe a means by which non-automatic FSM extraction occurs. The presence of any of these standard FSM description additions shall override the tool’s default extraction mechanism.<br><br>Identification of an FSM consists of identifying the following items:
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<li value="1" class="Element600">the state register (or expression)</li>
<li value="2" class="Element600">the next state register (this is optional)</li>
<li value="3" class="Element600">the legal states.</li>
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<a href="00364.html" target="topic">29.4 VPI coverage extensions</a> </div></td><td class="Element206" valign="top" width="50%">
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