const.asm

VCP201_CODE is a FPGA source code.

;==========================================================================
; File Name : const.asm
;
;Rev:   Date:    Author:     Reason:
;1.00   18-06-96 C.H.Lai     First Version
;1.1s   14-09-96 C.H.Lai     Special version for SV362 to fix y-scale
;==========================================================================

#define all_intr        INTCON,GIE      ; GLOBAL INTERRUPT ENABLE BIT

;#define so_pin          TRISC,1         ; must be bank 1

#define timebase_intr   INTCON,T0IF     ; timer0 interrupt as time base
#define t200us_bit      TMR0,3

;#define sio_intr        PIR2,CCP2IF     ; serial comm. request signal
;#define        sio_dbg_pin     PORTE,2         ; serial debugging tap point


#define eecs_pin        PORTD,1         ; E2PROM CS pin
#define eesk_pin        PORTD,2         ; "      SK "
#define eedi_pin        PORTD,3         ; "      DI "
#define eedo_pin        PORTD,4         ; "      DO "

#define buzzer          PORTC,6
#define program_led     PORTA,4

#define	mode_led1	PORTD,0
#define	mode_led2	PORTC,2

#define DTR             PORTB,0         ; PORT B
#define DSR             PORTC,7        	; PORT C
#define SDO             PORTC,5         ; PORT C

#define TRIS_DSR	TRISC,7		; I/O control of DSR
#define	TRIS_SDO	TRISC,5		; I/O control of SDO

#define	sen_group1	PORTD,7
#define	sen_group2	PORTD,6
#define	sen_group3	PORTD,5	

#define	auto_dis_sw	PORTB,7
#define auto_en_sw	PORTB,6

spi_transmit	macro
	call	spi_comm
	btfsc	STATUS,C
	goto	end_SPI
	endm

DSR_shot	macro
        bcf	DSR		; rxdata ='80', passed, activate /DSR
	nop				; delay   3us
	nop
        nop
        nop
        nop
        nop
	bsf	DSR		; negate /DSR
	endm



ADD_nop8       macro
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        endm



; writting 1 to unused TRIS bit may cause unexpected result
; e.g. 0xff to TRISE cause TRISD cannot clear to zero
; start  ---->  HI-Z   ----->  PB  ---->  EE  ----\
;                ^               \------>  MEM ----|
;                \--------------------------------/
#define DIR_HIZ_A       b'00100000'     ; RA initial mode
#define DIR_HIZ_B       b'11111111'     ; RB "       "
#define DIR_HIZ_C       b'10111001'     ; RC "       "
#define DIR_HIZ_D       b'00010000'     ; RD "       "
#define DIR_HIZ_E       b'00000111'     ; RE "       "


#define CONT_BIT_SEL    7               ; 1st byte to host
#define CONT_BIT_L3    	6
#define CONT_BIT_R3     5
#define CONT_BIT_ST     4
#define CONT_BIT_UP     3
#define CONT_BIT_RT     2
#define CONT_BIT_DN     1
#define CONT_BIT_LT     0               ; 2nd byte to host
#define CONT_BIT_L2     7
#define CONT_BIT_R2     6
#define CONT_BIT_L1     5
#define CONT_BIT_R1     4
#define CONT_BIT_TRI    3
#define CONT_BIT_CIR    2
#define CONT_BIT_CRO    1
#define CONT_BIT_SQU    0

#define MEMTOP          H'0ff'          ;POINTER AT TOP OF BUTTON DATA MEMORY
#define PBMAX           D'014'          ;MAXIMUM # OF FIRE BUTTONS

#define TIME1SEC        D'76'   ;1.0 SEC
#define TIME700MS       D'53'   ;0.7 SEC
#define TIME500MS       D'38'   ;0.5 SEC
#define TIME200MS       D'15'   ;0.2 SEC
#define TIME100MS       D'8'    ;0.1 SEC
#define TIME65MS        D'5'    ;0.07 SEC
#define TIME52MS        D'4'    ;0.05 SEC
#define TIME26MS        D'2'    ;0.03 SEC
#define TIME13MS        D'1'    ;0.01 SEC

#define DBC1SEC         TIME1SEC        ;1 SECONDS
#define DBC700MS        TIME700MS       ;0.7 SECONDS
#define DBC500MS        TIME500MS       ;0.5 SECONDS
#define DBC200MS        TIME200MS       ;0.2 SECONDS
#define DBC100MS        TIME100MS       ;0.1 SECONDS
#define DBC26MS         TIME26MS        ;0.026 SECONDS

#define I_DUR_STEP      TIME65MS        ;0.07 SECONDS
#define DUR_SLOW        TIME52MS        ;10 HZ
#define DUR_AUTO        TIME52MS        ;10 HZ

#define DURBZON         TIME100MS       ;BUZZER ON DURATION
#define DURBZOFF        TIME100MS       ;BUZZER OFF DURATION
#define BEEP_STEP       1
#define BEEP_1          D'001'          ;BEEP ONCE
#define BEEP_2          D'002'          ;BEEP TWICE
#define BEEP_3          D'003'          ;BEEP THREE TIMES

#define PLEDON          H'88'           ;LED ALWAYS ON
#define PLEDOFF         H'00'           ;LED ALWAYS OFF
#define PLED1ST         H'B3'           ;LED BLINKS AT NORMAL RATE
#define PLEDSTEP        H'84'           ;LED BLINKS ONCE 
#define PLEDMEM         H'A2'           ;LED BLINKS AT FAST RATE

#define IDLE            H'EE'           ;CODE FOR IDLE PERIOD
#define REPEAT          H'EF'           ;CODE FOR REPEAT FUNCTION
#define CODE_1          D'01'           ;ONE BYTE STEP
#define CODE_2          D'02'           ;TOW BYTE STEP
#define CODE_3          D'03'           ;THREE BYTE STEP

#define CRC_BIT_8_0     b'00000000'     ;XOR CODE IF BIT 8 = 0
#define CRC_BIT_8_1     b'10000101'     ;XOR CODE IF BIT 8 = 1
#define CRC5_MASK       b'00010101'     ; for addr. crc
#define CRC8_MASK       CRC_BIT_8_1     ; for data crc

#define CNTL_DATA_WORD  D'08'           ;TOTAL # OF WORD FOR CONTROL DATA
#define PB_DATA_WORD    D'14'          	;TOTAL # OF WORD FOR BUTTON DATA (E4 - FF)
#define CNTL_POINTER    pbid_0          ;POINTER OF STARTING ADDRESS OF CONTROL DATA
#define DATA_POINTER    H'E4'           ;POINTER OF STARTING ADDRESS OF BUTTON DATA
;#define PTR_PBRAW0      H'59'           ;POINTER OF PB_RAW0 BUFFER
;
#define EEP_ADDR_1      H'00'           ;BUTTON ADDRESS OF EEPROM
#define EEP_ADDR_2      H'20'           ;DEFAULT BUTTON ADDRESS OF EEPROM
#define CNTL_DATA       D'14'           ;# OF BYTE OF CONTROL DATA
#define PB_DATA         D'14'           ;# OF BYTE OF DEFAULT BUTTON DATA
#define SIZE_LENGTH     D'1'            ;DEFAULT BUTTON DATA LENGTH=1

#define RESET_PB0       B'11110011'     ;RESET BUTTON A & X PRESSED
#define RESET_PB1       B'10111111'     ;RESET BUTTON ST PRESSED

#define CNTL_DATA_TOTAL D'15'           ;TOT.# OF CONTROL DATA=15
#define PB_DATA_TOTAL   D'28'           ;TOT.# OF BUTTON DATA =90

#define ADC_CONF        0x80            ; osc/32,chn0,A/D off
#define ADC_ANA_IN      0x00            ; vdd ref., RA0,1,3 ana in
#define ADC_DIG_IN      0x07            ; RA0-5 digital in

;#define TY_ABS          0x01
;#define TY_REL          0x02
;#define TY_JPORT        0x04
;#define TY_EEP          0x80

;#define ST_CP_IN        0
;#define ST_CP_OUT       1
;#define ST_ADR_ERR      2
;#define ST_EE_BUSY      7

;#define PAD_TYPE_L      (TY_ABS | TY_JPORT)     ; JOY PAD type byte
;#define PAD_TYPE_H      0x00

#define ALT_SCALE_X     0xa0
#define ALT_SCALE_Y     0xa0
#define SCALE_X         0x70
#define SCALE_Y         0x7E

;#define BIT_TIMEOUT     d'64'           ; SIO bit timeout constant

#define STEP_SIZE_1     D'1'            ;STEP SIZE OF 1 BYTE
#define STEP_SIZE_2     D'2'            ;STEP SIZE OF 2 BYTES
#define STEP_SIZE_3     D'3'            ;STEP SIZE OF 3 BYTES
#define STEP_TMR_1      D'8'            ;STEP DURATION COUNTER = 1*DUR_STEP
#define STEP_TMR_2      D'16'           ;STEP DURATION COUNTER = 2*DUR_STEP
#define STEP_TMR_4      D'32'           ;STEP DURATION COUNTER = 4*DUR_STEP
#define STEP_TMR_8      D'64'           ;STEP DURATION COUNTER = 8*DUR_STEP

#define movw            movwf


#define	digital_id	0x82		; 0x41 mode
#define	analog_id	0xce		; 0x73 mode


#define		INIT_4f_1	0xfc

#define		NULL_OFFSET	d'10'
#define		MAX_SEN		0x70

#define		DEFAULT_AXES	0xfe	; 7f

;code # stored in EEPROM
#define	pb_square	d'0'
#define	pb_cross	d'1'
#define	pb_circle	d'2'
#define pb_triangle	d'3'
#define	pb_R1		d'4'
#define	pb_L1		d'5'
#define	pb_R2		d'6'
#define	pb_L2		d'7'
#define	pb_left		d'8'
#define	pb_down		d'9'
#define	pb_right	d'10'
#define	pb_up		d'11'