liangzhu.map.summary

来自「FPGA开发入门的Verilog HDL程序2---梁祝音乐播放,真实可用」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Tue Jul 22 02:35:51 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : liangzhu
Top-level Entity Name : liangzhu
Family : Cyclone
Total logic elements : 123
Total pins : 3
Total virtual pins : 0
Total memory bits : 1,024
Total PLLs : 0