gpseep.lst

微程序控制器采用ATMEL AVR MEGA162

__text_start:
__start:
    0110 EFCF      LDI	R28,0xFF
    0111 E0D4      LDI	R29,4
    0112 BFCD      OUT	0x3D,R28
    0113 BFDE      OUT	0x3E,R29
    0114 51C0      SUBI	R28,0x10
    0115 40D0      SBCI	R29,0
    0116 EA0A      LDI	R16,0xAA
    0117 8308      STD	Y+0,R16
    0118 2400      CLR	R0
    0119 EAEB      LDI	R30,0xAB
    011A E0F2      LDI	R31,2
    011B E013      LDI	R17,3
    011C 3BE8      CPI	R30,0xB8
    011D 07F1      CPC	R31,R17
    011E F011      BEQ	0x0121
    011F 9201      ST	R0,Z+
    0120 CFFB      RJMP	0x011C
    0121 8300      STD	Z+0,R16
    0122 E7E4      LDI	R30,0x74
    0123 E0F0      LDI	R31,0
    0124 E0A0      LDI	R26,0
    0125 E0B1      LDI	R27,1
    0126 E012      LDI	R17,2
    0127 31EF      CPI	R30,0x1F
    0128 07F1      CPC	R31,R17
    0129 F021      BEQ	0x012E
    012A 95C8      LPM
    012B 9631      ADIW	R30,1
    012C 920D      ST	R0,X+
    012D CFF9      RJMP	0x0127
    012E 940E023A  CALL	_main
_exit:
    0130 CFFF      RJMP	_exit
_setGPS:
  i                    --> R20
  p                    --> R22
  command              --> R20
    0131 940E0430  CALL	push_gset2
    0133 01A8      MOVW	R20,R16
FILE: F:\mydoc\avrproject\icc\big162\gpseep\smain.c
(0001) #include "sci.h"
(0002) 
(0003) #include "modem.h"
(0004) #include <stdlib.h>
(0005) unsigned char  disgga[]={
(0006) 0XB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x00,0x00,0x00,0x00,0x00,0xFD,0x15// CANCEL GGA
(0007) };
(0008) unsigned char  disgll[]={
(0009) 0xB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x01,0x00,0x00,0x00,0x00,0xFE,0x1A//,CANCEL GLL
(0010) };
(0011) unsigned char  disgsa[]={
(0012) 0xB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x02,0x00,0x00,0x00,0x00,0xFF,0x1F// CANCEL GSA
(0013) };
(0014) unsigned char  disgsv[]={
(0015) 0XB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x03,0x00,0x00,0x00,0x00,0x00,0x24// CANCEL GSV
(0016) };
(0017) unsigned char  disvtg[]={
(0018) 0xB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x05,0x00,0x00,0x00,0x00,0x02,0x2E// CANCEL VTG
(0019) };
(0020) unsigned char  disgrs[]={
(0021) 0XB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x06,0x00,0x00,0x00,0x00,0x03,0x33// CANCEL GRS
(0022) };
(0023) unsigned char  disgst[]={
(0024) 0xB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x07,0x00,0x00,0x00,0x00,0x04,0x38// CANCEL GST
(0025) };
(0026) unsigned char  diszda[]={
(0027) 0XB5,0x62,0x06,0x01,0x06,0x00,0xF0,0x08,0x00,0x00,0x00,0x00,0x05,0x3D// CANCEL ZDA
(0028) };
(0029) 
(0030) void setGPS(BYTE *command){
(0031) 	BYTE *p,i;
(0032) 	p = command;
    0134 01BA      MOVW	R22,R20
(0033) 	for (i = 0;i < 14;i ++){
    0135 2744      CLR	R20
    0136 C007      RJMP	0x013E
(0034) 	    WriteComm1( *p );
    0137 01FB      MOVW	R30,R22
    0138 8100      LDD	R16,Z+0
    0139 940E03F9  CALL	_WriteComm1
(0035) 		p ++;	   
    013B 5F6F      SUBI	R22,0xFF
    013C 4F7F      SBCI	R23,0xFF
    013D 9543      INC	R20
    013E 304E      CPI	R20,0xE
    013F F3B8      BCS	0x0137
(0036) 	}
(0037) 	DelayMORE(10);
    0140 E00A      LDI	R16,0xA
    0141 940E01B2  CALL	_DelayMORE
    0143 940E0424  CALL	pop_gset2
    0145 9508      RET
(0038) }
(0039) void iniGPS(){
(0040) 	setGPS(disgga);
_iniGPS:
    0146 E000      LDI	R16,0
    0147 E011      LDI	R17,1
    0148 DFE8      RCALL	_setGPS
(0041) 	setGPS(disgll);
    0149 E00E      LDI	R16,0xE
    014A E011      LDI	R17,1
    014B DFE5      RCALL	_setGPS
(0042) 	setGPS(disgsa);
    014C E10C      LDI	R16,0x1C
    014D E011      LDI	R17,1
    014E DFE2      RCALL	_setGPS
(0043) 	setGPS(disgsv);
    014F E20A      LDI	R16,0x2A
    0150 E011      LDI	R17,1
    0151 DFDF      RCALL	_setGPS
(0044) 	setGPS(disvtg);
    0152 E308      LDI	R16,0x38
    0153 E011      LDI	R17,1
    0154 DFDC      RCALL	_setGPS
(0045) 	setGPS(disgrs);
    0155 E406      LDI	R16,0x46
    0156 E011      LDI	R17,1
    0157 DFD9      RCALL	_setGPS
(0046) 	setGPS(disgst);
    0158 E504      LDI	R16,0x54
    0159 E011      LDI	R17,1
    015A DFD6      RCALL	_setGPS
(0047) 	setGPS(diszda);
    015B E602      LDI	R16,0x62
    015C E011      LDI	R17,1
    015D DFD3      RCALL	_setGPS
    015E 9508      RET
(0048) }
(0049) void port_init(void)
(0050) {
(0051)  PORTA = 0x04;
_port_init:
    015F E084      LDI	R24,4
    0160 BB8B      OUT	0x1B,R24
(0052)  DDRA  = 0x04;//speaker
    0161 BB8A      OUT	0x1A,R24
(0053)  PORTB = 0x01;
    0162 E081      LDI	R24,1
    0163 BB88      OUT	0x18,R24
(0054)  DDRB  = 0x01;
    0164 BB87      OUT	0x17,R24
(0055)  PORTC = 0x00; 
    0165 2422      CLR	R2
    0166 BA25      OUT	0x15,R2
(0056)  DDRC  = 0x00;
    0167 BA24      OUT	0x14,R2
(0057)  PORTD = 0x00;
    0168 BA22      OUT	0x12,R2
(0058)  DDRD  = 0x00;
    0169 BA21      OUT	0x11,R2
(0059)  DDRD |= BIT(STA);
    016A 9A8D      SBI	0x11,5
(0060)  DDRD |= BIT(STC);
    016B 9A8E      SBI	0x11,6
    016C 9508      RET
(0061) }
(0062) 
(0063) 
(0064) 
(0065) //UART0 initialize
(0066) // desired baud rate: 9600
(0067) // actual: baud rate:9600 (0.0%)
(0068) // char size: 8 bit
(0069) // parity: Disabled
(0070) void uart0_init(void)
(0071) {
(0072)  UCSR0B = 0x00; //disable while setting baud rate
_uart0_init:
    016D 2422      CLR	R2
    016E B82A      OUT	0x0A,R2
(0073)  UCSR0A = 0x00; //disable while setting baud rate
    016F B82B      OUT	0x0B,R2
(0074)  UBRR0L  =0x17; //set baud rate
    0170 E187      LDI	R24,0x17
    0171 B989      OUT	0x09,R24
(0075)  UBRR0H = 0x00;
    0172 BC20      OUT	0x20,R2
(0076)  UCSR0C = BIT(URSEL0) | 0x06;
    0173 E886      LDI	R24,0x86
    0174 BD80      OUT	0x20,R24
(0077)  UCSR0A = 0x00; //enable
    0175 B82B      OUT	0x0B,R2
(0078)  //UCSR0B = 0x18; //enable
(0079)  UCSR0B = (1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0);
    0176 E988      LDI	R24,0x98
    0177 B98A      OUT	0x0A,R24
(0080)  setCommEventProc(ProcModemReceive);
    0178 E700      LDI	R16,0x70
    0179 E010      LDI	R17,0
    017A 940E041F  CALL	_setCommEventProc
    017C 9508      RET
(0081)  
(0082) }
(0083) 
(0084) //UART1 initialize
(0085) 
(0086) // actual baud rate:9600 (0.0%)
(0087) // char size: 8 bit
(0088) // parity: Disabled
(0089) void uart1_init(void)
(0090) {
(0091)  UCSR1B = 0x00; //disable while setting baud rate
_uart1_init:
    017D 2422      CLR	R2
    017E B821      OUT	0x01,R2
(0092)  UCSR1A = 0x00; //disable while setting baud rate
    017F B822      OUT	0x02,R2
(0093)  UBRR1L  =0x17; //set baud rate
    0180 E187      LDI	R24,0x17
    0181 B980      OUT	0x00,R24
(0094)  UBRR1H = 0x00;
    0182 BE2C      OUT	0x3C,R2
(0095)  UCSR1C = BIT(URSEL1) | 0x06;
    0183 E886      LDI	R24,0x86
    0184 BF8C      OUT	0x3C,R24
(0096)  UCSR1A = 0x00; //enable
    0185 B822      OUT	0x02,R2
(0097)  //UCSR1B = (1<<RXEN1)|(1<<TXEN1)|(1<<RXCIE1);
(0098)  UCSR1B = (1<<RXEN1)|(1<<TXEN1);
    0186 E188      LDI	R24,0x18
    0187 B981      OUT	0x01,R24
    0188 9508      RET
(0099) }
(0100) 
(0101) //call this routine to initialize all peripherals
(0102) void init_devices(void)
(0103) {
(0104)  //stop errant interrupts until set up
(0105)  CLI(); //disable all interrupts
_init_devices:
    0189 94F8      BCLR	7
(0106)  port_init();
    018A DFD4      RCALL	_port_init
(0107)  uart0_init();
    018B DFE1      RCALL	_uart0_init
(0108)  uart1_init();
    018C DFF0      RCALL	_uart1_init
(0109) 
(0110)  MCUCR= 0x00; //mcu control register
    018D 2422      CLR	R2
    018E BE25      OUT	0x35,R2
(0111)  EMCUCR = 0x00;//extend ect
    018F BE26      OUT	0x36,R2
(0112)  //GIMSK= 0x00;
(0113)  TIMSK= 0x00; //timer interrupt sources
    0190 BE29      OUT	0x39,R2
(0114)  ETIMSK=0x00;
    0191 9220007D  STS	0x7D,R2
(0115)  GICR= 0x00;//general interrupt control register
    0193 BE2B      OUT	0x3B,R2
(0116)  PCMSK0=0x00;
    0194 9220006B  STS	0x6B,R2
(0117)  PCMSK1=0x00;
    0196 9220006C  STS	0x6C,R2
(0118)  SEI(); //re-enable interrupts
    0198 9478      BSET	7
    0199 9508      RET
FILE: F:\mydoc\avrproject\icc\big162\gpseep\common.c
(0001) #include "common.h"
(0002) void delay(BYTE a)
(0003) {
_delay:
  a                    --> R16
    019A C001      RJMP	0x019C
(0004)     while(a)
(0005)     a--;
    019B 950A      DEC	R16
    019C 2300      TST	R16
    019D F7E9      BNE	0x019B
(0006)     asm("nop");
    019E 0000      NOP
    019F 9508      RET
_DelayM:
  a                    --> R20
  b                    --> R22
  c                    --> R16
    01A0 940E0430  CALL	push_gset2
(0007) }
(0008) 
(0009) 
(0010) void DelayM(BYTE c)
(0011) {
(0012)     unsigned char a;
(0013) 	unsigned int b;
(0014)     for (a = c; a; a--)
    01A2 2F40      MOV	R20,R16
    01A3 C009      RJMP	0x01AD
(0015)     for (b = 64911; b; b++)
    01A4 E86F      LDI	R22,0x8F
    01A5 EF7D      LDI	R23,0xFD
    01A6 C002      RJMP	0x01A9
    01A7 5F6F      SUBI	R22,0xFF
    01A8 4F7F      SBCI	R23,0xFF
    01A9 3060      CPI	R22,0
    01AA 0767      CPC	R22,R23
    01AB F7D9      BNE	0x01A7
    01AC 954A      DEC	R20
    01AD 2344      TST	R20
    01AE F7A9      BNE	0x01A4
    01AF 940E0424  CALL	pop_gset2
    01B1 9508      RET
_DelayMORE:
  a                    --> R20
  b                    --> R22
  c                    --> R16
    01B2 940E0430  CALL	push_gset2
(0016)     ;
(0017) }
(0018) 
(0019) void DelayMORE(BYTE c)
(0020) {
(0021)     unsigned char a;
(0022) 	unsigned int b;
(0023)     for (a = c; a; a--)
    01B4 2F40      MOV	R20,R16
    01B5 C009      RJMP	0x01BF
(0024)     for (b = 1; b; b++)
    01B6 E061      LDI	R22,1
    01B7 E070      LDI	R23,0
    01B8 C002      RJMP	0x01BB
    01B9 5F6F      SUBI	R22,0xFF
    01BA 4F7F      SBCI	R23,0xFF
    01BB 3060      CPI	R22,0
    01BC 0767      CPC	R22,R23
    01BD F7D9      BNE	0x01B9
    01BE 954A      DEC	R20
    01BF 2344      TST	R20
    01C0 F7A9      BNE	0x01B6
    01C1 940E0424  CALL	pop_gset2
    01C3 9508      RET
(0025)     ;
(0026) }
(0027) 
(0028) 
(0029) BYTE volatile timerCounter = 0;
(0030) BYTE volatile timerCounter1 = 0;
(0031) BYTE volatile timerCounter2 = 0;
(0032) BYTE timepoint;
(0033) BYTE timepoint1;
(0034) BYTE timepoint2;
(0035) void initTimer()
(0036) {
(0037)  	TCCR0 = 5;  // timer0 prescale 1/1024 (7)
_initTimer:
    01C4 E085      LDI	R24,5
    01C5 BF83      OUT	0x33,R24
(0038)   	timepoint=255;
    01C6 EF8F      LDI	R24,0xFF
    01C7 938002AD  STS	timepoint,R24
    01C9 9508      RET
_SIG_OVERFLOW0:
    01CA 922A      ST	R2,-Y
    01CB 923A      ST	R3,-Y
    01CC 924A      ST	R4,-Y
    01CD 938A      ST	R24,-Y
    01CE 939A      ST	R25,-Y
    01CF B62F      IN	R2,0x3F
    01D0 922A      ST	R2,-Y
(0039) }
(0040) #pragma interrupt_handler SIG_OVERFLOW0:18
(0041) 
(0042) void SIG_OVERFLOW0(void)//timer0
(0043) {
(0044)   	if(timerCounter++ > timepoint){
    01D1 90200170  LDS	R2,timerCounter
    01D3 2433      CLR	R3
    01D4 2D82      MOV	R24,R2
    01D5 5F8F      SUBI	R24,0xFF
    01D6 93800170  STS	timerCounter,R24
    01D8 904002AD  LDS	R4,timepoint
    01DA 1442      CP	R4,R2
    01DB F478      BCC	0x01EB
(0045) 		PORTD ^= BIT(STA);
    01DC E280      LDI	R24,0x20
    01DD B222      IN	R2,0x12
    01DE 2628      EOR	R2,R24
    01DF BA22      OUT	0x12,R2
(0046)         PORTD ^= BIT(STC);
    01E0 E480      LDI	R24,0x40
    01E1 B222      IN	R2,0x12
    01E2 2628      EOR	R2,R24
    01E3 BA22      OUT	0x12,R2
(0047)         PORTA ^= BIT(SPEAKER);//alarm
    01E4 E084      LDI	R24,4
    01E5 B22B      IN	R2,0x1B
    01E6 2628      EOR	R2,R24
    01E7 BA2B      OUT	0x1B,R2
(0048) 		timerCounter = 0;
    01E8 2422      CLR	R2
    01E9 92200170  STS	timerCounter,R2
(0049) 	}
    01EB 9029      LD	R2,Y+
    01EC BE2F      OUT	0x3F,R2
    01ED 9199      LD	R25,Y+
    01EE 9189      LD	R24,Y+
    01EF 9049      LD	R4,Y+
    01F0 9039      LD	R3,Y+
    01F1 9029      LD	R2,Y+
    01F2 9518      RETI
(0050)     
(0051) }
(0052) void initTimer2()
(0053) {
(0054)  TCCR2= 5; //prescale 1/1024
_initTimer2:
    01F3 E085      LDI	R24,5
    01F4 BD87      OUT	0x27,R24
(0055) 
(0056)  timerCounter2 = 20;
    01F5 E184      LDI	R24,0x14
    01F6 93800172  STS	timerCounter2,R24
    01F8 9508      RET
_timer2_ovf_isr:
    01F9 922A      ST	R2,-Y
    01FA 923A      ST	R3,-Y
    01FB 924A      ST	R4,-Y
    01FC 938A      ST	R24,-Y
    01FD 939A      ST	R25,-Y
    01FE B62F      IN	R2,0x3F
    01FF 922A      ST	R2,-Y
(0057) }
(0058) #pragma interrupt_handler timer2_ovf_isr:12
(0059) void timer2_ovf_isr(void)//timer2
(0060) {
(0061)   	if(timerCounter2++ > timepoint2){
    0200 90200172  LDS	R2,timerCounter2
    0202 2433      CLR	R3
    0203 2D82      MOV	R24,R2
    0204 5F8F      SUBI	R24,0xFF
    0205 93800172  STS	timerCounter2,R24
    0207 904002AC  LDS	R4,timepoint2
    0209 1442      CP	R4,R2
    020A F438      BCC	0x0212
(0062) 		
(0063) 		cbi( TIMSK, TOIE2 );
    020B B789      IN	R24,0x39
    020C 7F8B      ANDI	R24,0xFB
    020D BF89      OUT	0x39,R24
(0064)         timerCounter2 = 0;
    020E 2422      CLR	R2
    020F 92200172  STS	timerCounter2,R2
(0065)         PORTA |= BIT(SPEAKER);
    0211 9ADA      SBI	0x1B,2
(0066) 	}
    0212 9029      LD	R2,Y+
    0213 BE2F      OUT	0x3F,R2
    0214 9199      LD	R25,Y+
    0215 9189      LD	R24,Y+
    0216 9049      LD	R4,Y+
    0217 9039      LD	R3,Y+
    0218 9029      LD	R2,Y+
    0219 9518      RETI
(0067) }
(0068) 
(0069) void timer1_init(void)
(0070) {
(0071)  TCCR1B= 0x00; //stop18s
_timer1_init:
    021A 2422      CLR	R2
    021B BC2E      OUT	0x2E,R2
(0072)  TCCR1A= 0x00;
    021C BC2F      OUT	0x2F,R2
(0073)  TCCR1B= 0x05; //start Timer
    021D E085      LDI	R24,5
    021E BD8E      OUT	0x2E,R24
(0074)  timepoint1=3;
    021F E083      LDI	R24,3
    0220 938002AB  STS	timepoint1,R24
    0222 9508      RET
_timer1_ovf_isr:
    0223 940E0452  CALL	push_lset
(0075) }
(0076) #pragma interrupt_handler timer1_ovf_isr:16
(0077) void timer1_ovf_isr(void)
(0078) {
(0079) 
(0080)  //TCNT1H= 0x02; //reload counter high value
(0081)  //TCNT1L= 0xE1; //reload counter low value
(0082)     if(timerCounter1++ > timepoint1){
    0225 90200171  LDS	R2,timerCounter1
    0227 2433      CLR	R3
    0228 2D82      MOV	R24,R2
    0229 5F8F      SUBI	R24,0xFF
    022A 93800171  STS	timerCounter1,R24
    022C 904002AB  LDS	R4,timepoint1
    022E 1442      CP	R4,R2
    022F F408      BCC	0x0231
(0083)     	watchdog_init();//reset
    0230 D003      RCALL	_watchdog_init
(0084)     }
    0231 940E0469  CALL	pop_lset
    0233 9518      RETI
(0085)     //PORTA ^= BIT(SPEAKER);
(0086) }
(0087)