📄 one_pulse_lcd.rpt
字号:
cpldfit: version F.31 Xilinx Inc.
Fitter Report
Design Name: ONE_PULSE_LCD Date: 8- 8-2004, 7:48PM
Device Used: XC95108-7-PQ100
Fitting Status: Successful
**************************** Resource Summary ****************************
Macrocells Product Terms Registers Pins Function Block
Used Used Used Used Inputs Used
87 /108 ( 81%) 450 /540 ( 83%) 57 /108 ( 53%) 34 /81 ( 42%) 141/216 ( 65%)
PIN RESOURCES:
Signal Type Required Mapped | Pin Type Used Remaining
------------------------------------|---------------------------------------
Input : 11 11 | I/O : 31 44
Output : 22 22 | GCK/IO : 3 0
Bidirectional : 1 1 | GTS/IO : 0 2
GCK : 0 0 | GSR/IO : 0 1
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 34 34
MACROCELL RESOURCES:
Total Macrocells Available 108
Registered Macrocells 57
Non-registered Macrocell driving I/O 10
GLOBAL RESOURCES:
Global clock net(s) unused.
Global output enable net(s) unused.
Global set/reset net(s) unused.
POWER DATA:
There are 87 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
There are a total of 87 macrocells used (MC).
End of Resource Summary
**************************** Errors and Warnings *************************
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB6,
because too many function block product terms are required. Buffering output
signal DP<0> to allow all signals assigned to this function block to be
placed.
***************Resources Used by Successfully Mapped Logic******************
** LOGIC **
Signal Total Signals Loc Pwr Slew Pin Pin Pin Reg Init
Name Pt Used Mode Rate # Type Use State
$OpTx$BIN_BCD_LCD/BIN_BCD/Madd__n0312__n00002/BIN_BCD_LCD/BIN_BCD/Madd__n0312__n00002_D2_INV$501 6 5 FB3_12 STD 41 I/O (b)
BIN_BCD_LCD/BB<0> 6 7 FB2_7 STD (b) (b) RESET
BIN_BCD_LCD/BB<1> 4 6 FB3_7 STD (b) (b) RESET
BIN_BCD_LCD/BG<0> 2 2 FB3_3 STD 32 I/O (b) RESET
BIN_BCD_LCD/BG<1> 21 11 FB4_18 STD (b) (b) RESET
BIN_BCD_LCD/BG<2> 18 12 FB4_13 STD (b) (b) RESET
BIN_BCD_LCD/BG<3> 26 8 FB2_3 STD 99 I/O (b) RESET
BIN_BCD_LCD/BIN_BCD/_n0310/BIN_BCD_LCD/BIN_BCD/_n0310_D2 4 4 FB3_6 STD 35 I/O (b)
BIN_BCD_LCD/BIN_BCD/_n0311/BIN_BCD_LCD/BIN_BCD/_n0311_D2 5 4 FB3_9 STD 38 I/O (b)
BIN_BCD_LCD/BIN_BCD/_n0334/BIN_BCD_LCD/BIN_BCD/_n0334_D2 9 5 FB3_15 STD 43 I/O (b)
BIN_BCD_LCD/BIN_BCD/_n0335/BIN_BCD_LCD/BIN_BCD/_n0335_D2 10 5 FB3_17 STD 51 I/O (b)
BIN_BCD_LCD/BS<0> 19 10 FB2_15 STD 12 I/O (b) RESET
BIN_BCD_LCD/BS<1> 12 7 FB3_2 STD 31 I/O (b) RESET
BIN_BCD_LCD/BS<2> 9 7 FB3_14 STD 42 I/O (b) RESET
BIN_BCD_LCD/BS<3> 6 7 FB3_10 STD 45 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<0> 1 1 FB5_1 STD (b) (b) RESET
BIN_BCD_LCD/CNT/Q<10> 3 18 FB6_18 STD (b) (b) RESET
BIN_BCD_LCD/CNT/Q<11> 3 18 FB6_17 STD 80 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<12> 3 18 FB6_16 STD 81 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<13> 2 15 FB6_13 STD (b) (b) RESET
BIN_BCD_LCD/CNT/Q<14> 2 16 FB6_10 STD (b) (b) RESET
BIN_BCD_LCD/CNT/Q<1> 2 2 FB1_2 STD 15 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<2> 2 3 FB3_16 STD 44 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<3> 2 5 FB5_5 STD 55 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<4> 2 6 FB5_4 STD 48 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<5> 2 7 FB5_3 STD 54 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<6> 3 18 FB6_15 STD 79 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<7> 2 9 FB5_2 STD 52 I/O (b) RESET
BIN_BCD_LCD/CNT/Q<8> 2 10 FB6_7 STD (b) (b) RESET
BIN_BCD_LCD/CNT/Q<9> 2 11 FB6_12 STD 76 I/O (b) RESET
BIN_BCD_LCD/LCD/COUNT<0> 3 5 FB5_7 STD (b) (b) RESET
BIN_BCD_LCD/LCD/COUNT<1> 4 5 FB5_13 STD (b) (b) RESET
BIN_BCD_LCD/LCD/COUNT<2> 4 5 FB5_10 STD (b) (b) RESET
BIN_BCD_LCD/LCD/LD<0>_OBUF/BIN_BCD_LCD/LCD/LD<0>_OBUF_RSTF 2 2 FB1_16 STD 29 GCK/I/O I
BIN_BCD_LCD/LCD/LD<1>_OBUF/BIN_BCD_LCD/LCD/LD<1>_OBUF_RSTF 2 3 FB4_10 STD (b) (b)
BIN_BCD_LCD/LCD/LD<2>_OBUF/BIN_BCD_LCD/LCD/LD<2>_OBUF_RSTF__$INT 2 3 FB4_7 STD (b) (b)
BIN_BCD_LCD/LCD/LD<3>_OBUF/BIN_BCD_LCD/LCD/LD<3>_OBUF_RSTF 2 3 FB4_4 STD 82 I/O I
BIN_BCD_LCD/LCD/LD<4>_OBUF/BIN_BCD_LCD/LCD/LD<4>_OBUF_RSTF 3 3 FB4_16 STD 94 I/O (b)
BIN_BCD_LCD/LCD/P<0>_OBUF/BIN_BCD_LCD/LCD/P<0>_OBUF_RSTF__$INT 5 6 FB5_14 STD 63 I/O (b)
BIN_BCD_LCD/LCD/P<0>_OBUF/BIN_BCD_LCD/LCD/P<0>_OBUF_SETF 3 6 FB5_6 STD 56 I/O (b)
BIN_BCD_LCD/LCD/P<1>_OBUF/BIN_BCD_LCD/LCD/P<1>_OBUF_RSTF__$INT 5 6 FB3_8 STD 37 I/O (b)
BIN_BCD_LCD/LCD/P<1>_OBUF/BIN_BCD_LCD/LCD/P<1>_OBUF_SETF 3 6 FB3_11 STD 39 I/O (b)
BIN_BCD_LCD/LCD/P<2>_OBUF/BIN_BCD_LCD/LCD/P<2>_OBUF_RSTF__$INT 4 5 FB3_5 STD 34 I/O (b)
BIN_BCD_LCD/LCD/P<2>_OBUF/BIN_BCD_LCD/LCD/P<2>_OBUF_SETF 2 5 FB3_1 STD (b) (b)
BIN_BCD_LCD/LCD/P<3>_OBUF/BIN_BCD_LCD/LCD/P<3>_OBUF_RSTF__$INT 4 5 FB3_4 STD 36 I/O (b)
BIN_BCD_LCD/LCD/P<3>_OBUF/BIN_BCD_LCD/LCD/P<3>_OBUF_SETF 2 5 FB3_18 STD (b) (b)
DP<0> 1 1 FB6_5 STD FAST 69 I/O O
DP<0>_BUFR 13 18 FB6_14 STD 78 I/O (b) SET
DP<1> 13 18 FB6_3 STD FAST 68 I/O O SET
DP<2> 13 18 FB6_2 STD FAST 67 I/O O SET
DP<3> 14 19 FB5_17 STD FAST 66 I/O O SET
LD<0> 2 4 FB5_12 STD FAST 62 I/O O RESET
LD<1> 2 4 FB5_16 STD FAST 61 I/O O RESET
LD<2> 2 4 FB5_11 STD FAST 60 I/O O RESET
LD<3> 2 4 FB5_9 STD FAST 58 I/O O RESET
LD<4> 2 4 FB5_8 STD FAST 57 I/O O RESET
LED_OUT<0> 1 1 FB4_2 STD FAST 83 I/O O
LED_OUT<1> 1 1 FB4_3 STD FAST 84 I/O O
LED_OUT<2> 1 1 FB4_5 STD FAST 87 I/O O
LED_OUT<3> 1 1 FB4_6 STD FAST 88 I/O O
LED_OUT<4> 1 1 FB4_8 STD FAST 89 I/O O
LED_OUT<5> 1 1 FB4_9 STD FAST 91 I/O O
LED_OUT<6> 1 1 FB4_11 STD FAST 92 I/O O
LED_OUT<7> 1 1 FB4_12 STD FAST 93 I/O O
ONE_PULSE/OUT 3 4 FB1_7 STD (b) (b) RESET
ONE_PULSE/OUT/ONE_PULSE/OUT_CLKF__$INT 1 2 FB2_17 STD 14 I/O (b)
ONE_PULSE/U1/Q 2 2 FB4_15 STD 96 I/O (b) RESET
ONE_PULSE/U1/QB 2 2 FB2_5 STD 1 GSR/I/O (b) RESET
ONE_PULSE/U1/QB/ONE_PULSE/U1/QB_CLKF__$INT 1 3 FB2_13 STD (b) (b)
ONE_PULSE/U1/U2/Q<0> 2 4 FB2_8 STD 5 GTS/I/O (b) RESET
ONE_PULSE/U1/U2/Q<1> 4 7 FB1_3 STD 16 I/O (b) RESET
ONE_PULSE/U1/U2/Q<2> 4 7 FB2_6 STD 3 I/O (b) RESET
ONE_PULSE/U2/Q<0> 10 15 FB2_12 STD 10 I/O (b) RESET
ONE_PULSE/U2/Q<1> 13 15 FB1_10 STD 26 I/O I RESET
ONE_PULSE/U2/Q<2> 16 15 FB1_15 STD 27 I/O I RESET
ONE_PULSE/U2/Q<3> 19 15 FB1_18 STD (b) (b) RESET
ONE_PULSE/U2/Q<4> 16 15 FB1_13 STD (b) (b) RESET
ONE_PULSE/U2/Q<5> 13 15 FB1_5 STD 17 I/O (b) RESET
ONE_PULSE/U2/Q<6> 10 15 FB2_11 STD 8 I/O (b) RESET
ONE_PULSE/U2/Q<7> 7 15 FB2_9 STD 6 GTS/I/O (b) RESET
ONE_PULSE/U3/T_QB 2 2 FB2_18 STD (b) (b) RESET
P<0> 2 2 FB6_11 STD FAST 74 I/O O RESET
P<1> 2 2 FB6_9 STD FAST 73 I/O O RESET
P<2> 2 2 FB6_8 STD FAST 72 I/O O RESET
P<3> 2 2 FB6_6 STD FAST 70 I/O O RESET
PH 3 19 FB5_15 STD FAST 65 I/O I/O SET
P_PULSE 2 9 FB1_6 STD FAST 18 I/O O
** INPUTS **
Signal Loc Pin Pin Pin
Name # Type Use
CLK_40Mhz FB4_4 82 I/O I
CLR FB1_16 29 GCK/I/O I
DATA_IN<0> FB1_10 26 I/O I
DATA_IN<1> FB1_14 25 GCK/I/O I
DATA_IN<2> FB1_12 24 GCK/I/O I
DATA_IN<3> FB1_11 22 I/O I
DATA_IN<4> FB1_4 21 I/O I
DATA_IN<5> FB1_9 20 I/O I
DATA_IN<6> FB1_17 30 I/O I
DATA_IN<7> FB1_8 19 I/O I
KEY FB1_15 27 I/O I
End of Resources Used by Successfully Mapped Logic
*********************Function Block Resource Summary***********************
Function # of FB Inputs Signals Total O/IO IO
Block Macrocells Used Used Pt Used Req Avail
FB1 10 26 26 90 1/0 14
FB2 12 29 29 90 0/0 14
FB3 17 21 21 89 0/0 14
FB4 15 19 19 58 8/0 13
FB5 17 25 31 55 6/1 13
FB6 16 21 27 68 7/0 13
---- ----- ----- -----
87 450 22/1 81
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 26/10
Number of signals used by logic mapping into function block: 26
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 /\5 0 FB1_1 (b) (b)
BIN_BCD_LCD/CNT/Q<1>
2 1<- /\4 0 FB1_2 STD 15 I/O (b)
ONE_PULSE/U1/U2/Q<1>
4 0 /\1 0 FB1_3 STD 16 I/O (b)
(unused) 0 0 \/5 0 FB1_4 21 I/O I
ONE_PULSE/U2/Q<5> 13 8<- 0 0 FB1_5 STD 17 I/O (b)
P_PULSE 2 0 /\3 0 FB1_6 STD 18 I/O O
ONE_PULSE/OUT 3 0 \/2 0 FB1_7 STD (b) (b)
(unused) 0 0 \/5 0 FB1_8 19 I/O I
(unused) 0 0 \/5 0 FB1_9 20 I/O I
ONE_PULSE/U2/Q<1> 13 12<- \/4 0 FB1_10 STD 26 I/O I
(unused) 0 0 \/5 0 FB1_11 22 I/O I
(unused) 0 0 \/5 0 FB1_12 24 GCK/I/O I
ONE_PULSE/U2/Q<4> 16 14<- \/3 0 FB1_13 STD (b) (b)
(unused) 0 0 \/5 0 FB1_14 25 GCK/I/O I
ONE_PULSE/U2/Q<2> 16 11<- 0 0 FB1_15 STD 27 I/O I
BIN_BCD_LCD/LCD/LD<0>_OBUF/BIN_BCD_LCD/LCD/LD<0>_OBUF_RSTF
2 0 /\3 0 FB1_16 STD 29 GCK/I/O I
(unused) 0 0 \/5 0 FB1_17 30 I/O I
ONE_PULSE/U2/Q<3> 19 14<- 0 0 FB1_18 STD (b) (b)
Signals Used by Logic in Function Block
1: BIN_BCD_LCD/CNT/Q<0>
10: DATA_IN<5> 19: ONE_PULSE/U2/Q<0>
2: BIN_BCD_LCD/LCD/COUNT<1>
11: KEY 20: ONE_PULSE/U2/Q<1>.FBK.LFBK
3: BIN_BCD_LCD/LCD/COUNT<2>
12: ONE_PULSE/OUT.FBK.LFBK
21: ONE_PULSE/U2/Q<2>.FBK.LFBK
4: CLK_40Mhz 13: ONE_PULSE/OUT/ONE_PULSE/OUT_CLKF__$INT
22: ONE_PULSE/U2/Q<3>.FBK.LFBK
5: CLR 14: ONE_PULSE/U1/Q 23: ONE_PULSE/U2/Q<4>.FBK.LFBK
6: DATA_IN<1> 15: ONE_PULSE/U1/QB 24: ONE_PULSE/U2/Q<5>.FBK.LFBK
7: DATA_IN<2> 16: ONE_PULSE/U1/U2/Q<0>
25: ONE_PULSE/U2/Q<6>
8: DATA_IN<3> 17: ONE_PULSE/U1/U2/Q<1>.FBK.LFBK
26: ONE_PULSE/U2/Q<7>
9: DATA_IN<4> 18: ONE_PULSE/U1/U2/Q<2>
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
BIN_BCD_LCD/CNT/Q<1>
X..X.................................... 2 2
ONE_PULSE/U1/U2/Q<1>
...XX........XXXXX...................... 7 7
ONE_PULSE/U2/Q<5> ...XX....X.X...XXXXXXXXXXX.............. 15 15
P_PULSE ...........X......XXXXXXXX.............. 9 9
ONE_PULSE/OUT ....X.....XXX........................... 4 4
ONE_PULSE/U2/Q<1> ...XXX.....X...XXXXXXXXXXX.............. 15 15
ONE_PULSE/U2/Q<4> ...XX...X..X...XXXXXXXXXXX.............. 15 15
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -