traffic.v

交通灯电子钟实现,能应用于实际中...

module traffic(clk,clk_1k,en,lampa1,lampa2,lampa3,lampa4,lampb1,lampb2,lampb3,lampb4,acounth,acountl,bcounth,bcountl,mode,change,turn,alert,hour,min,sec,LD_alert,LD_hour,LD_min);
output[3:0] acounth,acountl,bcounth,bcountl;
output lampa1,lampa2,lampa3,lampa4,lampb1,lampb2,lampb3,lampb4,alert,LD_alert,LD_hour,LD_min;
input clk,clk_1k,en,mode,change,turn;
reg tempa,tempb;
reg[2:0] counta,countb;
reg[7:0] numa,numb;
reg[7:0] ared,ayellow,agreen,aleft,bred,byellow,bgreen,bleft;
reg lampa1,lampa2,lampa3,lampa4,lampb1,lampb2,lampb3,lampb4;
////////////////
output[7:0] hour,min,sec;
reg[7:0] hour,min,sec,hour1,min1,sec1,ahour,amin;
reg[1:0] m,fm,num1,num2,num3,num4;
reg[1:0] loop1,loop2,loop3,loop4,sound;
reg LD_alert,LD_hour,LD_min;
reg clk_1Hz,clk_2Hz,minclk,hclk;
reg alert1,alert2,ear;
reg count1,count2,counta1,countb1;
reg cn1,cn2;
wire ct1,ct2,cta,ctb,m_clk,h_clk;
///////////////////////////
always @(en)
if(!en)
begin
ared<=8'b01010101;
ayellow<=8'b00000101;
agreen<=8'b01000000;
aleft<=8'b00010101;
bred<=8'b01100101;
byellow<=8'b00000101;
bleft<=8'b00010101;
bgreen<=8'b00110000;
end
assign {acounth,acountl}=numa;
assign {bcounth,bcountl}=numb;

always@(posedge clk_1Hz)
begin
if(en)
begin
if(!tempa)
          begin
tempa<=1;
case(counta)
0:begin numa<=agreen;{lampa1,lampa2,lampa3,lampa4}<=2;counta<=1;end
1:begin numa<=ayellow;{lampa1,lampa2,lampa3,lampa4}<=4;counta<=2;end
2:begin numa<=aleft;{lampa1,lampa2,lampa3,lampa4}<=1;counta<=3;end
3:begin numa<=ayellow;{lampa1,lampa2,lampa3,lampa4}<=4;counta<=4;end
4:begin numa<=ared;{lampa1,lampa2,lampa3,lampa4}<=8;counta<=0;end
default:{lampa1,lampa2,lampa3,lampa4}<=8;
endcase
          end
else //（tempa)
      begin
         if(numa>1)
         if(numa[3:0]==0)
            begin
           numa[3:0]<=4'b1001;
           numa[7:4]<=numa[7:4]-1;
            end
         else 
         numa[3:0]<=numa[3:0]-1;
       if(numa==2)tempa<=0;
       end
end//(en)
else
         begin
{lampa1,lampa2,lampa3,lampa4}<=4'b1000;
counta<=0;tempa<=0;
         end
end//(always）

always@(posedge clk_1Hz)
begin
if(en)
begin
if(!tempb)
begin//
tempb<=1;
case(countb)
0:begin numb<=bred;{lampb1,lampb2,lampb3,lampb4}<=8;countb<=1;end
1:begin numb<=bgreen;{lampb1,lampb2,lampb3,lampb4}<=2;countb<=2;end
2:begin numb<=byellow;{lampb1,lampb2,lampb3,lampb4}<=4;countb<=3;end
3:begin numb<=bleft;{lampb1,lampb2,lampb3,lampb4}<=1;countb<=4;end
4:begin numb<=byellow;{lampb1,lampb2,lampb3,lampb4}<=4;countb<=0;end
default: {lampb1,lampb2,lampb3,lampb4}<=8;
endcase
end//
else
begin///
if(!numb[3:0])
begin
numb[3:0]<=9;
numb[7:4]<=numb[7:4]-1;
end
else 
numb[3:0]<=numb[3:0]-1;
if(numb==2)
tempb<=0;
end
end
else
begin
{lampb1,lampb2,lampb3,lampb4}<=4'b1000;
tempb<=0;
countb<=0;
end
end
/////////////////////////////////////////////////////////////////////////////////////////
always @(posedge clk)
begin
     clk_2Hz<=~clk_2Hz;
     if(sound==3)begin sound<=0;ear<=1;end
     else begin sound<=sound+1;ear<=0;end
end
always @(posedge clk_2Hz)           //由 4Hz 的输入时钟产生 1Hz 的时基信号
     clk_1Hz<=~clk_1Hz;
always @(posedge mode)                            //mode 信号控制系统的功能转换
begin if(m==2)m<=0;else m<=m+1;end
always @(posedge turn)
fm<=~fm;



always                                                            //产生 count1,count2,counta1,countb1 四个信号
begin
  case(m) 
  2:begin if(fm)
          begin count1<=change;{LD_alert,LD_min,LD_hour}<=3'b010;end
                    else 
          begin counta1<=change;{LD_alert,LD_min,LD_hour}<=3'b001;end
          {count2,countb1}<=0;
        end 
  1:begin if(fm)
          begin count2<=change;{LD_alert,LD_min,LD_hour}<=3'b110;end
                    else 
          begin countb1<=change;{LD_alert,LD_min,LD_hour}<=3'b101;end
          {count1,counta1}<=2'b00;
        end 
    default:{count1,count2,counta1,countb1,LD_alert,LD_min,LD_hour}<=0;
    endcase
      end 

always @(negedge clk)
              //如果长时间按下“change”键，则生成“num1”信号用于连续快速加 1
if(count2)  begin
            if(loop1==3)num1<=1;
                        else 
            begin loop1<=loop1+1;num1<=0;end
                        end 
else        begin loop1<=0;num1<=0;end
always @(negedge clk)
if(countb1)  begin
            if(loop2==3)num2<=1;
                        else 
            begin loop2<=loop2+1;num2<=0;end
                        end 
else        begin loop2<=0;num2<=0;end
always @(negedge clk)
if(count1)  begin
if(loop3==3)num3<=1;
                        else 
            begin loop3<=loop3+1;num3<=0;end
                        end 
else        begin loop3<=0;num3<=0;end
always @(negedge clk)
if(counta1)  begin
            if(loop4==3)num4<=1;
                        else 
            begin loop4<=loop4+1;num4<=0;end
                        end 
else        begin loop4<=0;num4<=0;end

assign ct1=(num3&clk)|(!num3&m_clk);
assign ct2=(num1&clk)|(!num1&count2);
assign cta=(num4&clk)|(!num4&h_clk);
assign ctb=(num2&clk)|(!num2&countb1);

always @(posedge clk_1Hz)               //秒计时和秒调整
       if(!(sec1^8'h59)|turn&(!m))
                        begin 
            sec1<=0;if(!(turn&(!m)))minclk<=1;
                        end 
              else begin 
            if(sec1[3:0]==4'b1001)
            begin sec1[3:0]<=4'b0000;sec1[7:4]<=sec1[7:4]+1;end
                        else sec1[3:0]<=sec1[3:0]+1;minclk<=0; 
                        end 
assign m_clk=minclk||count1;

always @(posedge ct1)                                        //分计时和分调整
              begin 
       if(min1==8'h59)begin min1<=0;hclk<=1;end
              else begin 
                        if(min1[3:0]==9) 
            begin min1[3:0]<=0;min1[7:4]<=min1[7:4]+1;end
       else min1[3:0]<=min1[3:0]+1;hclk<=0;
              end 
              end 
assign h_clk=hclk||counta1;

always @(posedge cta)                                      //小时计时和小时调整
       if(hour1==8'h23)hour1<=0;
       else if(hour1[3:0]==9)
begin hour1[7:4]<=hour1[7:4]+1;hour1[3:0]<=0;end
       else hour1[3:0]<=hour1[3:0]+1;

always @(posedge ct2)                                      //定时功能中的分钟调节
       if(amin==8'h59)amin<=0;
              else if(amin[3:0]==9) 
       begin amin[3:0]<=0;amin[7:4]<=amin[7:4]+1;end
              else amin[3:0]<=amin[3:0]+1; 

always @(posedge ctb)                                      //定时功能中的小时调节
       if(ahour==8'h23)ahour<=0;
       else if(ahour[3:0]==9)
       begin ahour[3:0]<=0;ahour[7:4]<=ahour[7:4]+1;end
       else ahour[3:0]<=ahour[3:0]+1;

always                                                                    //闹铃功能
       if((min1==amin)&&(hour1==ahour)&&(amin|ahour)&&(!change))
       if(sec1<8'h20)alert1<=1;         //控制闹铃时间长短
              else alert1<=0; 
              else alert1<=0; 

always                                                                    //时，分，秒的显示控制
              case(m) 
       3'b00:begin hour<=hour1;min<=min1;sec<=sec1;end     //计时状态
       3'b01:begin hour<=ahour;min<=amin;sec<=8'hzz;end    //定时状态
       3'b10:begin hour<=hour1;min<=min1;sec<=8'hzz;end    //校时状态
              endcase 

assign alert=((alert1)?clk_1k&clk:0)|alert2;

always
begin
       if((min1==8'h59)&&(sec1>8'h54)||(!(min1|sec1)))
       if(sec1>8'h54)alert2<=ear&clk_1k;
       else alert2<=!ear&clk_1k;
              else alert2<=0; 
end

endmodule